Abstract: An MIS transistor comprises first and second concave grooves (17, 17) opposing to each other with a gate electrode (4, 39) provided therebetween. Source and drain regions (8a, 8b, 31, 34) are formed on sidewalls of the concave grooves. A configuration of the sidewall surface of the concave groove is selected such that a current density of a punch through current between the source and drain regions becomes uniform. Furthermore, a concave groove having such a configuration, for example, a taper configuration in which a space between sidwwall surfaces becomes narrower toward a bottom portion of the substrate, is formed by the reactive ion etching.The MIS transistor is employed in an input protection circuit or an output driver circuit, which enables high integration of the device and improves an input breakdown voltage.