Abstract: An electronic control device includes: an acquisition unit that acquires state information indicating at least one of a state of a movable body and a state of an external environment in which the movable body is moving, and a control instruction indicating at least one of a steering control instruction for steering the movable body and an acceleration control instruction for adjusting acceleration of the movable body; and a determining unit that determines whether the control instruction is a false control instruction based on the at least one state indicated by the state information acquired and control indicated by the control instruction acquired.

Abstract: An electronic control device includes: an acquisition unit that acquires state information indicating at least one of a state of a movable body and a state of an external environment in which the movable body is moving, and a control instruction indicating at least one of a steering control instruction for steering the movable body and an acceleration control instruction for adjusting acceleration of the movable body; and a determining unit that determines whether the control instruction is a false control instruction based on the at least one state indicated by the state information acquired and control indicated by the control instruction acquired.

Abstract: A memory management unit manages a state of a memory which is to be accessed by bank interleaving. The memory includes p banks (where p is an integer of 2 or greater). The memory management unit includes a control unit that dynamically determines a bank to be accessed from among the p banks. When predetermined conditions for a reserving state of the memory are satisfied and there is any unused bank in the p banks, the control unit performs power consumption reduction to control the memory to cause power consumption of the unused bank(s) to be less than power consumption of other banks in the p banks except the unused bank(s).

Abstract: A memory control system includes: a plurality of I/O circuits; and a power control circuit that performs, when a predetermined condition for usage states of memories is satisfied, and an unused memory is present among the memories, a power consumption reduction process for causing a target I/O circuit to consume less power than an other one of the I/O circuits, the target I/O circuit being an I/O circuit among the I/O circuits that is connected to the unused memory.