Patents by Inventor Takashi Nagao

Takashi Nagao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12124337
    Abstract: A data store volume (DSVOL) for a snapshot group which is a group of the PVOL and one or more SVOLs for the PVOL is a data storage region where data of which a storage destination is one volume (VOL) of the snapshot group and meta-information of the data are stored, and the meta-information is information including address mapping between a reference source address which is an address of a position of the data in the snapshot group and a reference destination address which is an address of a position of the data in the DSVOL. A process of a storage system increases the number of DSVOLs in the snapshot group when an input/output (I/O) load on the snapshot group exceeds a threshold.
    Type: Grant
    Filed: March 8, 2023
    Date of Patent: October 22, 2024
    Assignee: Hitachi, Ltd.
    Inventors: Kazuki Matsugami, Tomohiro Yoshihara, Takashi Nagao
  • Patent number: 12086470
    Abstract: The present invention realizes a storage device that has a high data reduction effect without decreasing I/O performances. The storage device includes a processor, an accelerator, a memory, and a storage medium, the processor specifies data to be compressed that is data stored in the storage medium from data stored in the memory and transmits a compression instruction including information relating to the data to be compressed to the accelerator, and the accelerator reads the plurality of continuous items of data from the memory and compresses the plurality of items of data to be compressed obtained by excluding data that is not to be compressed from the plurality of items of data, based on the information relating to the data to be compressed received from the processor, to generate compressed data stored in the storage device.
    Type: Grant
    Filed: December 24, 2021
    Date of Patent: September 10, 2024
    Assignee: HITACHI, LTD.
    Inventors: Takashi Nagao, Tomohiro Yoshihara, Akira Yamamoto, Yuusaku Kiyota
  • Patent number: 12073089
    Abstract: A storage device manages data stored in a storage drive in a plurality of logical hierarchies. The plurality of logical hierarchies include a writing hierarchy above a hierarchy of a parity group including a plurality of storage drives. The storage device writes received host data in a free area in the writing hierarchy. In the data recovery process for replacing a failure storage drive with a new storage drive, the storage device executes the garbage collection process on a first logical area in the writing hierarchy associated with the first parity group including the failure storage drive. In the garbage collection process, valid data is selected from the first logical area and copied to a second logical area associated with a second parity group different from the first parity group.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: August 27, 2024
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Betsuno, Akira Yamamoto, Takashi Nagao, Kazuki Matsugami
  • Patent number: 12069813
    Abstract: The electronic device includes: a substrate having an electronic circuit formed therein; a housing for housing the substrate; and a connector disposed on the substrate and serving as an interface between outside and inside of the housing. The substrate has a main circuit pattern portion that forms a main circuit and a frame ground pattern portion that forms a frame ground. The main circuit pattern portion and the frame ground pattern portion are disposed so as not to overlap each other on the substrate and in the substrate. A terminal of the connector is disposed in the frame ground pattern portion.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: August 20, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Katsuhiko Omae, Takashi Nagao
  • Publication number: 20240235335
    Abstract: A control device that includes a circuit board, a plurality of heating elements that generate heat that accompanies driving the motor, and a rotation angle sensor that detects a rotation angle of the motor. The circuit board has a power supply input portion to which a driving current of the motor is supplied, a heating element mounting region where the plurality of the heating elements are mounted, and a controller mounting region where the rotation angle sensor is mounted. The power supply input portion, the heating element mounting region, and the controller mounting region are disposed in such an order. The circuit board, as seen from an axial direction of the rotating shaft, protrudes to an outside of a projection region that projects an outer surface of a cylindrical portion of a motor case that surrounds the motor. The power supply input portion is located on a portion out of portions of the circuit board that are on the outside of the projection region.
    Type: Application
    Filed: April 28, 2021
    Publication date: July 11, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshikuni TOMIOKA, Takashi NAGAO, Katsuhiko OMAE, Takahiro OKANOUE
  • Publication number: 20240176707
    Abstract: A data store volume (DSVOL) for a snapshot group which is a group of the PVOL and one or more SVOLs for the PVOL is a data storage region where data of which a storage destination is one volume (VOL) of the snapshot group and meta-information of the data are stored, and the meta-information is information including address mapping between a reference source address which is an address of a position of the data in the snapshot group and a reference destination address which is an address of a position of the data in the DSVOL. A process of a storage system increases the number of DSVOLs in the snapshot group when an input/output (I/O) load on the snapshot group exceeds a threshold.
    Type: Application
    Filed: March 8, 2023
    Publication date: May 30, 2024
    Inventors: Kazuki MATSUGAMI, Tomohiro YOSHIHARA, Takashi NAGAO
  • Publication number: 20240136894
    Abstract: A control device that includes a circuit board, a plurality of heating elements that generate heat that accompanies driving the motor, and a rotation angle sensor that detects a rotation angle of the motor. The circuit board has a power supply input portion to which a driving current of the motor is supplied, a heating element mounting region where the plurality of the heating elements are mounted, and a controller mounting region where the rotation angle sensor is mounted. The power supply input portion, the heating element mounting region, and the controller mounting region are disposed in such an order. The circuit board, as seen from an axial direction of the rotating shaft, protrudes to an outside of a projection region that projects an outer surface of a cylindrical portion of a motor case that surrounds the motor. The power supply input portion is located on a portion out of portions of the circuit board that are on the outside of the projection region.
    Type: Application
    Filed: April 27, 2021
    Publication date: April 25, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshikuni TOMIOKA, Takashi NAGAO, Katsuhiko OMAE, Takahiro OKANOUE
  • Publication number: 20240035122
    Abstract: The present invention provides an aluminum molded body having high thermal conductivity as well as higher strength than a rolled material, and a method for producing the aluminum molded body. More specifically, provided are an aluminum molded body having a thermal conductivity of 180 W/mK or higher and higher strength than a rolled material of the same composition, and a method with which it is possible to efficiently produce the aluminum molded body even when the shape thereof is complex. An aluminum layered molded body obtained by molding through an additive manufacturing method according to the present invention is characterized in that: an aluminum material containing 0.001-2.5 mass % of a transition metal element that forms a eutectic with Al, the balance being Al and unavoidable impurities, is used as a raw material; and the thermal conductivity is 180 W/mK or higher.
    Type: Application
    Filed: April 13, 2021
    Publication date: February 1, 2024
    Inventors: Masato YATSUKURA, Takashi NAGAO, Tsuguharu TASHIRO, Jun KUSUI
  • Patent number: 11880566
    Abstract: Provided is a storage system including a plurality of controllers. The storage system adopts a write-once data storage system and can implement high Input/Output (I/O) processing performance while ensuring data consistency when a failure occurs. Before metadata duplication, recovery data including information necessary for performing roll forward or roll back is stored in each controller, and then the metadata duplication is performed. A recovery data storage processing and the metadata duplication are offloaded to a hardware accelerator.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: January 23, 2024
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Betsuno, Takashi Nagao, Yuusaku Kiyota, Tomohiro Yoshihara
  • Publication number: 20230400982
    Abstract: A storage system includes: a central processing unit; a main memory; first management information that associates a hash value of received data with an address in a volume; and an I/O processing package. The I/O processing package includes an I/O processor and an I/O memory. The I/O processor executes protocol processing. The I/O processor executes at least a part of search processing of an address associated with a hash value of first received data in the first management information. The central processing unit controls execution of deduplication processing of the first received data based on data of an address associated with the hash value of the first received data.
    Type: Application
    Filed: March 1, 2023
    Publication date: December 14, 2023
    Applicant: Hitachi, Ltd.
    Inventors: Hiroka IHARA, Nobuhiro YOKOI, Takashi NAGAO, Yoshihiro YOSHII
  • Patent number: 11837516
    Abstract: In a semiconductor device, on a heat dissipation portion of a lead frame opposite to a mounting portion on which a semiconductor element is mounted, a thin molding portion having a thickness of about 0.02 mm to 0.3 mm is formed by a second molding resin which is a high-heat-dissipation resin. A scale-like portion on which scale-shaped projections are consecutively formed is provided over both sides across a resin boundary portion of the heat dissipation portion. The scale-like portion reaches abutting surfaces of an upper die and a lower die of a mold used in a molding process. Thus, the same void inhibition effect as with an air vent is obtained.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: December 5, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takanobu Kajihara, Katsuhiko Omae, Takashi Nagao, Atsuki Fujita, Ryosuke Takeshita, Masakazu Hamada
  • Patent number: 11816336
    Abstract: The present disclosure is to optimize processes in a storage system. A storage system includes: a first controller including a first computing device and a first memory; a second controller including a second computing device and a second memory; and an interface circuit that transfers data between the first controller and the second controller. The interface circuit reads first compressed data from the second memory. The interface circuit decompresses the first compressed data to generate first uncompressed data, and writes the first uncompressed data into the first memory.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: November 14, 2023
    Assignee: HITACHI, LTD.
    Inventors: Naoya Okada, Takashi Nagao, Kentaro Shimada, Ryosuke Tatsumi, Sadahiro Sugimoto
  • Patent number: 11782603
    Abstract: A bandwidth between a second processor and a second memory is higher than a bandwidth between a first processor and a first memory. The first memory stores a read command from a host computer. The first processor analyzes a content of the read command, and in accordance with a result of the analysis, requests read data from the second processor. In response to the request from the first processor, the second processor reads the read data from one or more storage drives and stores the read data in the second memory. The second processor notifies the first processor that the read data is stored in the second memory. The first processor transfers the read data read from the second memory, to the host computer without storing the read data in the first memory.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: October 10, 2023
    Assignee: Hitachi, Ltd.
    Inventors: Kentaro Shimada, Takashi Nagao, Naoya Okada
  • Publication number: 20230297242
    Abstract: A storage device manages data stored in a storage drive in a plurality of logical hierarchies. The plurality of logical hierarchies include a writing hierarchy above a hierarchy of a parity group including a plurality of storage drives. The storage device writes received host data in a free area in the writing hierarchy. In the data recovery process for replacing a failure storage drive with a new storage drive, the storage device executes the garbage collection process on a first logical area in the writing hierarchy associated with the first parity group including the failure storage drive. In the garbage collection process, valid data is selected from the first logical area and copied to a second logical area associated with a second parity group different from the first parity group.
    Type: Application
    Filed: September 19, 2022
    Publication date: September 21, 2023
    Applicant: Hitachi, Ltd.
    Inventors: Kenichi BETSUNO, Akira YAMAMOTO, Takashi NAGAO, Kazuki MATSUGAMI
  • Publication number: 20230280945
    Abstract: A storage system holds upper mapping information and lower mapping information. The upper mapping information manages an address relationship between a logical device upper layer accessed by a host and a logical device middle layer. The lower mapping information manages an address relationship between the logical device middle layer and a logical device lower layer. The lower mapping information includes pieces of partial mapping information. Each of the pieces of partial mapping information manages address information of a partial area in the logical device middle layer. The storage system writes, in response to a failure of first partial mapping information in the lower mapping information, new data that fills a first partial area in the logical device middle layer managed by the first partial mapping information, and regenerates the first partial mapping information.
    Type: Application
    Filed: September 12, 2022
    Publication date: September 7, 2023
    Inventors: Ryosuke TATSUMI, Takashi NAGAO, Kazuki MATSUGAMI
  • Patent number: 11740799
    Abstract: A storage system having high reliability and IO processing performance is realized. The storage system includes: a first arithmetic unit configured to receive an input and output request and perform data input and output processing; a first memory connected to the first arithmetic unit; a plurality of storage drives configured to store data; a second arithmetic unit; and a second memory connected to the second arithmetic unit. The first arithmetic unit instructs the storage drive to read data, the storage drive reads the data and stores the data in the second memory, the second arithmetic unit stores the data stored in the second memory in the first memory, and the first arithmetic unit transmits the data stored in the first memory to a request source of a read request for the data.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: August 29, 2023
    Assignee: HITACHI, LTD.
    Inventors: Takashi Nagao, Yuusaku Kiyota, Hideaki Monji, Tomohiro Yoshihara
  • Publication number: 20230214134
    Abstract: A storage controller manages a logical volume to which a host makes an access and which manages host data, an addition address space which is mapped with the logical volume and to which host data is added, and a physical address space which is mapped with the addition address space. In the addition address space, different address regions are allocated to respective parity groups. The storage controller selects, as an addition area of host data supplied from the host, an unoccupied address region in the addition address space. As the addition area, a region mapped to a normal status parity group in which data recovery is unnecessary is more preferentially selected than a region allocated to an abnormal status parity group in which data recovery is necessary.
    Type: Application
    Filed: September 7, 2022
    Publication date: July 6, 2023
    Inventors: Takashi NAGAO, Tomohiro YOSHIHARA, Hiroki FUJII
  • Patent number: 11668401
    Abstract: A dual gate valve includes two valve plates that open and close two openings of a valve box, a support bar that supports the two valve plates, a valve rod connected to the support bar, and an operation unit that performs an open and close operation of the two valve plates via the valve rod. The support bar and the valve plate linearly and elongatedly extend in a lateral direction perpendicular to a central axis of the valve rod. The valve rod is connected to a central portion in the long direction of the support bar, and one and the other of the two valve plates are tiltably attached to one end and the other end in the long direction of the support bar via elastic members, respectively.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: June 6, 2023
    Assignee: SMC CORPORATION
    Inventors: Hiromi Shimoda, Hiroshi Ogawa, Takashi Nagao
  • Publication number: 20230158570
    Abstract: The purpose of the present invention is to provide an aluminum alloy molded body that has excellent thermal stability and does not contain a rare earth element, and to provide a production method for the same. More specifically, the present invention provides an aluminum alloy molded body that has a high degree of hardness even at 200° C., and a method which enables efficient production of the same even if the aluminum alloy molded body has a complicated shape. An aluminum alloy laminated molded body according to the present invention, which is molded using an additive manufacturing method, is characterized in that: the raw material therefor is an aluminum alloy material containing 2-10 mass % of a transition metal element that forms a eutectic crystal with Al, with the remainder being Al and unavoidable impurities; the relative density thereof is at least 98.
    Type: Application
    Filed: April 13, 2021
    Publication date: May 25, 2023
    Inventors: Masato YATSUKURA, Takashi NAGAO, Tsuguharu TASHIRO, Jun KUSUI
  • Publication number: 20230136735
    Abstract: The present disclosure is to optimize processes in a storage system. A storage system includes: a first controller including a first computing device and a first memory; a second controller including a second computing device and a second memory; and an interface circuit that transfers data between the first controller and the second controller. The interface circuit reads first compressed data from the second memory. The interface circuit decompresses the first compressed data to generate first uncompressed data, and writes the first uncompressed data into the first memory.
    Type: Application
    Filed: December 19, 2022
    Publication date: May 4, 2023
    Inventors: Naoya OKADA, Takashi NAGAO, Kentaro SHIMADA, Ryosuke TATSUMI, Sadahiro SUGIMOTO