Patents by Inventor Takashi Numagi

Takashi Numagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11792917
    Abstract: An electronic module includes a first semiconductor device disposed on a first main surface of an insulating board of a printed wiring board, a first capacitor disposed on a second main surface of the insulating board at a position that overlaps with the first semiconductor device when viewed in a direction perpendicular to the first main surface, and a second capacitor disposed on the second main surface of the insulating board at a position that overlaps with the first semiconductor device when viewed in the direction perpendicular to the first main surface. A second electrode of the first capacitor is electrically connected to a ground pattern via a first ground via of the printed wiring board. A fourth electrode of the second capacitor is electrically connected to the ground pattern via a second ground via of the printed wiring board.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: October 17, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takuya Kondo, Takashi Numagi, Nobuaki Yamashita
  • Publication number: 20230283890
    Abstract: An electric circuit includes a first power-supply line, a second power-supply line, a ground line, a first circuit, a second circuit, an RC series circuit, a capacitor, and a noise filter. The first circuit is configured to be electrically connected to the first power-supply line via a first power-supply terminal and electrically connected to the ground line via a first ground terminal. The second circuit is configured to be electrically connected to the second power-supply line via a second power-supply terminal and electrically connected to the ground line via a second ground terminal. The RC series circuit is disposed between the first power-supply terminal and the first ground terminal. The capacitor is disposed between the second power-supply terminal and the second ground terminal. The noise filter is disposed between the first power-supply line and the second power-supply line.
    Type: Application
    Filed: May 12, 2023
    Publication date: September 7, 2023
    Inventors: Nobuaki Yamashita, Takuya Kondo, Takashi Numagi
  • Patent number: 11689801
    Abstract: An electric circuit includes a first power-supply line, a second power-supply line, a ground line, a first circuit, a second circuit, an RC series circuit, a capacitor, and a noise filter. The first circuit is configured to be electrically connected to the first power-supply line via a first power-supply terminal and electrically connected to the ground line via a first ground terminal. The second circuit is configured to be electrically connected to the second power-supply line via a second power-supply terminal and electrically connected to the ground line via a second ground terminal. The RC series circuit is disposed between the first power-supply terminal and the first ground terminal. The capacitor is disposed between the second power-supply terminal and the second ground terminal. The noise filter is disposed between the first power-supply line and the second power-supply line.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: June 27, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuaki Yamashita, Takuya Kondo, Takashi Numagi
  • Publication number: 20230187369
    Abstract: An electronic module includes a wiring board having a first main surface and a second main surface on a back side of the first main surface, and a first semiconductor element and a second semiconductor element that are mounted on the wiring board. The first semiconductor element includes a first signal terminal and a second signal terminal. The second semiconductor element includes a third signal terminal and a fourth signal terminal. The wiring board includes a first signal line including a first signal trace disposed in a first conductor layer, a second signal line including a second signal trace disposed in a second conductor layer that is closer to the second main surface than the first conductor layer is, a first ground trace disposed in the first conductor layer, and a second ground trace disposed in the second conductor layer.
    Type: Application
    Filed: November 29, 2022
    Publication date: June 15, 2023
    Inventors: Nobuaki Yamashita, Takashi Numagi, Kunihiko Uchida
  • Patent number: 11480910
    Abstract: A printed circuit board includes a printed wiring board, and a first element and a second element mounted on the printed wiring board. The printed wiring board includes a plurality of first signal lines and a plurality of second signal lines. The plurality of first signal lines each include a first main line, a first branch line, and a second branch line. The plurality of second signal lines each include a second main line, a third branch line, and a fourth branch line. The first branch line includes a first conductor pattern disposed in a first conductor layer. The second branch line includes a second conductor pattern disposed in the first conductor layer. The third branch line includes a third conductor pattern disposed in a second conductor layer. The fourth branch line includes a fourth conductor pattern disposed in the second conductor layer.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: October 25, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takashi Numagi, Kunihiko Uchida
  • Publication number: 20220321781
    Abstract: An electric circuit includes a first power-supply line, a second power-supply line, a ground line, a first circuit, a second circuit, an RC series circuit, a capacitor, and a noise filter. The first circuit is configured to be electrically connected to the first power-supply line via a first power-supply terminal and electrically connected to the ground line via a first ground terminal. The second circuit is configured to be electrically connected to the second power-supply line via a second power-supply terminal and electrically connected to the ground line via a second ground terminal. The RC series circuit is disposed between the first power-supply terminal and the first ground terminal. The capacitor is disposed between the second power-supply terminal and the second ground terminal. The noise filter is disposed between the first power-supply line and the second power-supply line.
    Type: Application
    Filed: March 24, 2022
    Publication date: October 6, 2022
    Inventors: Nobuaki Yamashita, Takuya Kondo, Takashi Numagi
  • Publication number: 20220304144
    Abstract: An electronic module includes a first semiconductor device disposed on a first main surface of an insulating board of a printed wiring board, a first capacitor disposed on a second main surface of the insulating board at a position that overlaps with the first semiconductor device when viewed in a direction perpendicular to the first main surface, and a second capacitor disposed on the second main surface of the insulating board at a position that overlaps with the first semiconductor device when viewed in the direction perpendicular to the first main surface. A second electrode of the first capacitor is electrically connected to a ground pattern via a first ground via of the printed wiring board. A fourth electrode of the second capacitor is electrically connected to the ground pattern via a second ground via of the printed wiring board.
    Type: Application
    Filed: March 14, 2022
    Publication date: September 22, 2022
    Inventors: Takuya Kondo, Takashi Numagi, Nobuaki Yamashita
  • Publication number: 20200393787
    Abstract: A printed circuit board includes a printed wiring board, and a first element and a second element mounted on the printed wiring board. The printed wiring board includes a plurality of first signal lines and a plurality of second signal lines. The plurality of first signal lines each include a first main line, a first branch line, and a second branch line. The plurality of second signal lines each include a second main line, a third branch line, and a fourth branch line. The first branch line includes a first conductor pattern disposed in a first conductor layer. The second branch line includes a second conductor pattern disposed in the first conductor layer. The third branch line includes a third conductor pattern disposed in a second conductor layer. The fourth branch line includes a fourth conductor pattern disposed in the second conductor layer.
    Type: Application
    Filed: June 5, 2020
    Publication date: December 17, 2020
    Inventors: Takashi Numagi, Kunihiko Uchida
  • Patent number: 10716211
    Abstract: A printed wiring board includes a plurality of first wirings and a plurality of second wirings. The plurality of first wirings each include a first via conductor disposed outside a first region, a second region, and a third region in a plan view, and a first conductor pattern extending from the first via conductor to the first region. The plurality of second wirings each include a second via conductor disposed outside the first region, the second region, and the third region, and a second conductor pattern extending from the second via conductor to the first region. A fourth region overlaps with a fifth region in the plan view, the fourth region being a region in which a plurality of first conductor patterns are disposed, the fifth region being a region in which a plurality of second conductor patterns are disposed.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: July 14, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takashi Numagi, Shoji Matsumoto, Hiroyuki Yamaguchi, Youhei Tazawa
  • Publication number: 20190246498
    Abstract: A printed wiring board includes a plurality of first wirings and a plurality of second wirings. The plurality of first wirings each include a first via conductor disposed outside a first region, a second region, and a third region in a plan view, and a first conductor pattern extending from the first via conductor to the first region. The plurality of second wirings each include a second via conductor disposed outside the first region, the second region, and the third region, and a second conductor pattern extending from the second via conductor to the first region. A fourth region overlaps with a fifth region in the plan view, the fourth region being a region in which a plurality of first conductor patterns are disposed, the fifth region being a region in which a plurality of second conductor patterns are disposed.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 8, 2019
    Inventors: Takashi Numagi, Shoji Matsumoto, Hiroyuki Yamaguchi, Youhei Tazawa
  • Patent number: 10306761
    Abstract: Provided is a printed wiring board including: a plurality of inner layers including a ground layer and a power supply layer; and a plurality of ground vias and a plurality of power supply vias each provided to penetrate at least the ground layer and the power supply layer in a thickness direction of the printed wiring board, a ground potential being applied to the plurality of ground vias at the ground layer, and a power supply potential being applied to the plurality of power supply vias at the power supply layer. In a top view from a direction perpendicular to the printed wiring board, a distance between vias to which the same potential is applied is shorter than a distance between vias to which different potentials are applied.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 28, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takashi Numagi, Youhei Tazawa, Shoji Matsumoto
  • Publication number: 20180168039
    Abstract: Provided is a printed wiring board including: a plurality of inner layers including a ground layer and a power supply layer; and a plurality of ground vias and a plurality of power supply vias each provided to penetrate at least the ground layer and the power supply layer in a thickness direction of the printed wiring board, a ground potential being applied to the plurality of ground vias at the ground layer, and a power supply potential being applied to the plurality of power supply vias at the power supply layer. In a top view from a direction perpendicular to the printed wiring board, a distance between vias to which the same potential is applied is shorter than a distance between vias to which different potentials are applied.
    Type: Application
    Filed: November 29, 2017
    Publication date: June 14, 2018
    Inventors: Takashi Numagi, Youhei Tazawa, Shoji Matsumoto
  • Patent number: 9907155
    Abstract: A printed wiring board includes a first main wire having first inner layer wiring patterns which are wired on inner layers connected by first via conductors in series. In addition, a second main wire has second inner layer wiring patterns which are wired on the inner layers connected by second via conductors. The first inner layer wiring patterns and the second inner layer wiring patterns are wired so as to change the layer to the inner layer on the opposite side to each other. First and second branch wires are branched from the first and second via conductors, respectively.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: February 27, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takashi Numagi, Hikaru Nomura, Masanori Kikuchi, Hiroyuki Mizuno
  • Patent number: 9894751
    Abstract: First and second semiconductor devices and first and second bypass circuits are mounted on a printed wiring board. The first bypass circuit and the second bypass circuit are provided closer to the first semiconductor device and to the second semiconductor device, respectively. The first bypass circuit has one end connected to a power plane through a first power supply via and the other end connected to a ground plane through a first ground via. The second bypass circuit has one end connected to the power plane through a second power supply via and the other end connected to the ground plane through a second ground via. The ground plane has a slit between the connecting portions of the first and second ground vias to increase the impedance between the connecting portions of the first and the second ground vias. Thus, jitters caused by power supply noise can be reduced.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: February 13, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yusuke Murai, Shoji Matsumoto, Takashi Numagi, Hiroyuki Yamaguchi, Nobuaki Yamashita
  • Publication number: 20160157336
    Abstract: First and second semiconductor devices and first and second bypass circuits are mounted on a printed wiring board. The first bypass circuit and the second bypass circuit are provided closer to the first semiconductor device and to the second semiconductor device, respectively. The first bypass circuit has one end connected to a power plane through a first power supply via and the other end connected to a ground plane through a first ground via. The second bypass circuit has one end connected to the power plane through a second power supply via and the other end connected to the ground plane through a second ground via. The ground plane has a slit between the connecting portions of the first and second ground vias to increase the impedance between the connecting portions of the first and the second ground vias. Thus, jitters caused by power supply noise can be reduced.
    Type: Application
    Filed: November 18, 2015
    Publication date: June 2, 2016
    Inventors: Yusuke Murai, Shoji Matsumoto, Takashi Numagi, Hiroyuki Yamaguchi, Nobuaki Yamashita
  • Publication number: 20150319845
    Abstract: A main wire 111 has inner layer wiring patterns 161 to 165 which are wired on an inner layers 114 and 115 connected by via conductors 166 to 169 in series. In addition, a main wire 112 has inner layer wiring patterns 181 to 185 which are wired on the inner layers 114 and 115 connected by via conductors 186 to 189. The inner layer wiring patterns 161 to 165 and the inner layer wiring patterns 181 to 185 are wired so as to change the layer to the inner layer on the opposite side to each other. Branch wires 1211 to 1214 and 1221 to 1224 are branched from the via conductors 166 to 169 and 186 to 189, respectively. Thereby, the present invention provides an inexpensive printed wiring board which can reduce ringing without upsizing the printed wiring board.
    Type: Application
    Filed: November 14, 2013
    Publication date: November 5, 2015
    Inventors: Takashi Numagi, Hikaru Nomura, Masanori Kikuchi, Hiroyuki Mizuno