Patents by Inventor Takashi Ogata

Takashi Ogata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6113835
    Abstract: A method of forming a separation groove and a ditch for cutting a thermoplastic resin sheet by a laser beam is performed as follows. A heat-resistant layer made of thermosetting resin is printed on the rear surface of the resin sheet along the line of the ditch to be formed by the laser beam. A laser beam is radiated on the front surface of the resin sheet and scanned along the line of the ditch and the separation groove. The laser beam melts and evaporates resin and forms the ditch and the separation groove. Since the rear end of the ditch is covered by the heat-resistant layer, the resin sheet is not completely separated along the ditch line, while it is separated along the separation groove line. At the final stage, the resin sheet is cut along the ditch line. A flexible circuit sheet for making electrical connection can be easily and cost effectively processed in this laser beam process.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: September 5, 2000
    Assignee: Denso Corporation
    Inventors: Shigeya Kato, Yasutaka Kamiya, Takashi Ogata, Takashi Hiraiwa
  • Patent number: 5570335
    Abstract: According to an aspect, to realize a transient correction circuit capable of performing a high-speed operation without being affected by low-frequency noise and allow to remove only the low-frequency noise without changing a reproducing waveform, an output from a HPF for removing the low-frequency noise of a reproduced signal is supplied to a waveform correction circuit for correcting the transient of the reproduced signal, which is generated by the HPF. The waveform correction circuit is constituted by a LPF, an adder for adding an output from the LPF and the output from the HPF, and a quantization circuit for quantizing an output from the adder. The HPF and the LPF have the same time constant.
    Type: Grant
    Filed: May 18, 1995
    Date of Patent: October 29, 1996
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Takashi Ogata, Junichi Nakano
  • Patent number: 5512766
    Abstract: A logic block of a memory (LSI) with logic functions includes RAM macrocells (RAMO-RAM7) and a centrally located gate array (GAO-GA5). Clock pulse shaping circuits (CSPO, CSP1) and input/output portion (I/O) surround the logic block. The logic block power supply includes a smoothing capacitor (CC) that is substantially the same size as a cell (GC) of the gate array. Each RAM macrocell has memory mats (MATOO-MAT21), word lines (WO-W127), data lines (DO-D7), and peripheral circuits (MPCOO-MPC21), which includes an address decoder and a sense amp (SAO). An input unit cell (ICO) receives ECL level signals and outputs ECL level signals (FIG. 5 ) and MOS level signals (FIG. 6 ). The input unit cells and analogous output unit cells (OCO) are selectively used singly or in parallel to accommodate signals of different form and driving capability. A wiring line replacement region (LRP) connects memory macrocell wiring lines with logic block wiring lines.
    Type: Grant
    Filed: October 15, 1993
    Date of Patent: April 30, 1996
    Assignees: Hitachi, Ltd., Hitachi Microcomputer System Ltd.
    Inventors: Mitsugu Kusunoki, Shuuichi Miyaoka, Michiaki Nakayama, Kouji Kobayashi, Masato Ikeda, Takashi Ogata
  • Patent number: 5495464
    Abstract: In an optical data recording/reproducing apparatus for performing write and read operations of data by irradiating laser light onto an optical data recording medium, in order to reduce noise of a semiconductor laser, an HF oscillator is provided to superpose an HF current on a drive current to be applied to the semiconductor laser. The HF oscillator is housed in a conductive shield case together with the semiconductor laser. An LC low-pass filter is also provided in a signal line connecting the components inside and outside the shield case to prevent undesired radiation of the HF current. A write drive line and a read drive line of the semiconductor laser are separated in the shield case, and the write drive line is disconnected from the HF oscillator in at least a read mode.
    Type: Grant
    Filed: August 26, 1994
    Date of Patent: February 27, 1996
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Kazuhiro Fujikawa, Nobuo Miyairi, Yasuhiro Miyazaki, Takashi Ogata, Masaaki Komiya
  • Patent number: 5444678
    Abstract: A magneto-optic recording magnetic head applies first and second magnetic fields to a magneto-optic disk having a recording film. The first magnetic field is used in a magnetic field modulation mode and the second magnetic field is utilized in a light modulation mode. The head comprises a yoke formed of a magnetic substance and having an opposing surface which opposes the recording film of the magneto-optic disk. A magnetic gap is formed between the yoke and a main magnetic pole magnetically coupled to the yoke. A cross-sectional area of the gap on a plane parallel to the recording film of the magneto-optic recording medium changes depending on whether the first or second magnetic field is generated, to maximize strengths of the first and second magnetic fields in accordance with the distance between the opposing surface of the yoke and the recording film of the disk.
    Type: Grant
    Filed: September 3, 1993
    Date of Patent: August 22, 1995
    Assignee: Olympus Optical Co., Ltd.
    Inventor: Takashi Ogata
  • Patent number: 5384738
    Abstract: A semiconductor integrated circuit device such as a memory device with logic function comprises a plurality of RAM macrocells and gate arrays. The RAM macrocells are constituted by bipolar CMOS RAMs having a total memory capacity of at least 100 kilobits, and the gate arrays contain at least 4000 gates. The logic circuits in the memory device with logic function or the like are constructed by selectively combining CMOS, bipolar CMOS or ECL gate circuits depending on the output load capacity, transmission characteristic requirement, power dissipation and required layout area. The level of signals at various circuits is set to the ECL level or MOS level depending on the local circuit configuration and other factors. The memory device further incorporates sequence control circuits required to be installed downstream of buffer storages of computers.
    Type: Grant
    Filed: February 1, 1994
    Date of Patent: January 24, 1995
    Assignees: Hitachi, Ltd., Hitachi Microcomputer System, Ltd.
    Inventors: Shuuichi Miyaoka, Kazuhisa Miyamoto, Masanori Odaka, Hideo Sawamoto, Michiaki Nakayama, Mitsugu Kusunoki, Masato Ikeda, Takashi Ogata, Kouji Kobayashi, Masao Kato, Tsutomu Sumimoto
  • Patent number: 5291445
    Abstract: A semiconductor integrated circuit device such as a memory device with logic function comprises a plurality of RAM macrocells and gate arrays. The RAM macrocells are constituted by bipolar CMOS RAMs having a total memory capacity of at least 100 kilobits, and the gate arrays contain at least 4000 gates. The logic circuits in the memory device with logic function or the like are constructed by selectively combining CMOS, bipolar CMOS or ECL gate circuits depending on the output load capacity, transmission characteristic requirement, power dissipation and required layout area. The level of signals at various circuits is set to the ECL level or MOS level depending on the local circuit configuration and other factors. The memory device further incorporates sequence control circuits required to be installed downstream of buffer storages of computers.
    Type: Grant
    Filed: September 28, 1990
    Date of Patent: March 1, 1994
    Assignees: Hitachi, Ltd., Hitachi Microcomputer System Ltd.
    Inventors: Shuuichi Miyaoka, Kazuhisa Miyamoto, Masanori Odaka, Hideo Sawamoto, Michiaki Nakayama, Mitsugu Kusunoki, Masato Ikeda, Takashi Ogata, Kouji Kobayashi, Masao Kato, Tsutomu Sumimoto
  • Patent number: 5278809
    Abstract: A photomagnetic recording apparatus, which has an optical head which has a light beam generating device for generating a fixed intensity light beam, and an optical system for condensing and irradiating the light beam onto a photomagnetic recording medium. The optical head is arranged on a first side of the medium. A recording magnetic biasing field generating device is arranged on the second side opposite to the first side of the medium. The device includes a first magnetic field generating device having a series resonant circuit having a head coil and a capacitor connected in series to each other. A driving signal feeding device feeds the series resonant circuit with an exciting signal synchronized with the resonant frequency of the series resonant circuit, to generate a first magnetic field to the medium.
    Type: Grant
    Filed: January 15, 1991
    Date of Patent: January 11, 1994
    Assignee: Olympus Optical Co., Ltd.
    Inventor: Takashi Ogata
  • Patent number: 5165321
    Abstract: A main bearing device for a bent axis type axial piston pump/motor constructed such that respective sums of a thrust load and a radial load, in other words, respective total loads acting on first and second bearings, respectively, disposed in a tandem arrangement in the axial direction of the main bearing device becomes uniform. The main bearing device has a first bearing (8) and a second bearing (9) that are disposed in the tandem arrangement through inner and outer wheel seats (10, 11) and a gap defined within the range of 10 to 30.mu. is formed between the inner side end surface (12) of the outer race (8b) of the first bearing (8) and the inner side end surface (13) of the outer wheel seat.
    Type: Grant
    Filed: January 16, 1990
    Date of Patent: November 24, 1992
    Assignee: Kabushiki Kaisha Komatsu Seisakusho
    Inventors: Takeo Arimoto, Takashi Ogata, Kazuyoshi Nagahara
  • Patent number: 5021785
    Abstract: A digital-to-analog converter converts digital data in the floating-point representation into an analog signal. The mantissa part of the digital data is first converted into a first analog signal by an R-2R resistor ladder network. The first analog signal thus obtained is directly supplied to another r-2r resistor ladder network to produce second analog signals whose values are 2.sup.-N (N=0, 1, 2, . . . ) magnifications of the first analog signal. And, one of the second analog signals is selectively outputted in accordance with the exponent part of the digital data. A data converter is also provided for converting digital data in the form of a fix-point number into floating point data.
    Type: Grant
    Filed: January 5, 1990
    Date of Patent: June 4, 1991
    Assignee: Yamaha Corporation
    Inventors: Takayuki Kohdaka, Katsuhiko Ishida, Toshiyuki Takahashi, Takashi Ogata
  • Patent number: 4874436
    Abstract: A method is provided for producing high purity electrolytic copper useful, for example, to make a copper wire for use in sound or image reproducing systems, such as audio, video and television systems, etc. The copper wire consists of high purity copper in which silver and sulfur contents are both not more than 0.5 ppm and preferably has a crystal grain size not less than 0.02 mm and is unidirectionally solidified or is a single crystal. Such a copper wire is manufactured by continuously casting electrodeposited copper which has been obtained by refining by re-electrolysis of electrolytic copper, using a specially arranged casting apparatus having a mold projecting to an electrolytic bath.
    Type: Grant
    Filed: August 26, 1988
    Date of Patent: October 17, 1989
    Assignee: Nippon Mining Co., Ltd.
    Inventors: Takashi Ogata, Masanori Kato, Yoshio Kawasumi, Chikara Tominaga, Kanji Tanaka
  • Patent number: 4845055
    Abstract: For preventing a semiconductor substrate from a heat attack, a method of rapid annealing using a lamp unit for a heat radiation comprises the step of preparing a semiconductor substrate having a multiple-layer structure and a vessel having an annealing chamber where the lamp unit is placed, the vessel is associated with an inert gas supplying system operative to supply a high-pressure inert gas to the annealing chamber, and the above step is followed by the steps of placing the semiconductor substrate in the annealing chamber, supplying the high-pressure inert gas to the annealing chamber so as to create a high-pressure inert ambient within a predetermined range and activating the lamp unit for the heat radiation so as to heat up the semiconductor substrate, so that the heat radiation is decreased in intensity by virtue of the high-pressure inert ambient.
    Type: Grant
    Filed: May 7, 1988
    Date of Patent: July 4, 1989
    Assignee: Yamaha Corporation
    Inventor: Takashi Ogata
  • Patent number: 4792369
    Abstract: The present invention relates to a copper wire for use in sound or image reproducing systems, such as audio, video and television systems, etc., and a method for manufacturing the same. The copper wire consists of high purity copper in which silver and sulfur contents are both not more than 0.5 ppm and preferably has a crystal grain size not less than 0.02 mm and is unidirectionally solidified or single crystallized. Such a copper wire is manufactured by continuously casting electrodeposited copper which has been obtained by refining by re-electrolysis of electrolytic copper, using a specially arranged casting apparatus having a mold projecting to an electrolytic bath.
    Type: Grant
    Filed: July 30, 1987
    Date of Patent: December 20, 1988
    Assignee: Nippon Mining Co., Ltd.
    Inventors: Takashi Ogata, Masanori Kato, Yoshio Kawasumi, Chikara Tominaga, Kanji Tanaka
  • Patent number: 4727355
    Abstract: A digital-to-analog converter (DAC) converts digital input data into an analog output signal with less harmonic distortion over an entire signal-level range. An exponent value detector detects from the digital input data the number of bits by which the digital input data is to be shifted to form a mantissa part thereof. A digital shifter shifts the digital input data in accordance with the output of the exponent value detector, and outputs the mantissa part which is then supplied to a mantissa-part DAC. The mantissa-part DAC comprises an R-2R resistor ladder network and outputs the result of DA conversion of the mantissa part to an exponent-part DAC. The exponent DAC shifts the output of the mantissa-part DAC by an amount determined by the output of the exponent value detector, and outputs the shifted signal as the analog output signal of this DAC.
    Type: Grant
    Filed: April 15, 1986
    Date of Patent: February 23, 1988
    Assignee: Nippon Gakki Seizo Kabushiki Kaisha
    Inventors: Takayuki Kohdaka, Katsuhiko Ishida, Toshiyuki Takahashi, Takashi Ogata
  • Patent number: 4572823
    Abstract: A process for rhenium recovery by the use of an anion exchange resin comprises eluting rhenium from the rhenium-adsorbed anion exchange resin with a hydrochloric acid solution containing a metal chloride. Preferred metal chloride is that of copper, cadmium, or zinc.
    Type: Grant
    Filed: May 7, 1984
    Date of Patent: February 25, 1986
    Assignee: Nihon Kogyo Kabushiki Kaisha
    Inventors: Takashi Ogata, Hiroshi Tasaki, Shunichi Kasai
  • Patent number: 4501666
    Abstract: Disclosed herein is a process for the selective removal of bismuth and/or antimony from an aqueous sulfuric acid solution containing dissolved bismuth and/or antimony mixed with other metals, such as an electrolyte formed in the electrolytic purification of metals, by which process bismuth and/or antimony are selectively removed from the above sulfuric acid solution by bringing said solution into contact with a phosphomethylamino chelate resin.
    Type: Grant
    Filed: May 2, 1984
    Date of Patent: February 26, 1985
    Assignee: Nippon Mining Co., Ltd.
    Inventors: Takashi Ogata, Hiroshi Hosaka, Shunichi Kasai
  • Patent number: 4483845
    Abstract: A process for producing arsenous acid is disclosed. The reactants include an organic solvent containing 5 valent arsenic, a reducing agent and an additional component selected from the group consisting of water and an aqueous solution. The organic solvent containing 5 valent arsenic contacts and reacts with the reducing agent in the presence of the water or aqueous solution in order to directly produce arsenous acid from the organic solvent containing 5 valent arsenic. The process is a simple and economical process for producing arsenous acid.
    Type: Grant
    Filed: September 29, 1982
    Date of Patent: November 20, 1984
    Assignee: Nippon Mining Co., Ltd.
    Inventors: Shunichi Kasai, Takashi Ogata, Teruo Tamanoi, Hiroshi Hosaka
  • Patent number: 4325629
    Abstract: Image forming methods and apparatus for forming an image, using an image forming sheet which has on an organic substrate to heat-developable image forming layer that is normally non-photosensitive but is rendered photosensitive by preheating prior to exposure and forms therein a latent image by exposure and then provides a visible image by heat development. An image forming area of the image forming sheet is preheated and heat-developed to obtain the visible image.
    Type: Grant
    Filed: December 4, 1980
    Date of Patent: April 20, 1982
    Assignee: Asahi Kasei Kogyo Kabushiki Kaisha
    Inventors: Takashi Ogata, Makoto Gonmori, Kenji Matano
  • Patent number: 4246240
    Abstract: An acid solution containing cobalt and nickel is contacted with an organic extraction medium comprising alkyl phosphonic acid mono alkyl ester where said alkyl group has 8-10 carbon atoms in two or more stages, wherein the contact at a first stage is carried out at a pH value not exceeding 5.0 and at a second and further stages being carried out at a pH range of 5.5-7.0. Thereby cobalt may effectively and selectively be extracted into the organic extraction medium from the solution without excess rise in viscosity. Cobalt and nickel may be separately recovered with high purity.
    Type: Grant
    Filed: June 28, 1979
    Date of Patent: January 20, 1981
    Assignee: Nippon Mining Co., Ltd.
    Inventors: Takashi Ogata, Shoichiro Namihisa, Tsumoru Fujii
  • Patent number: 4179794
    Abstract: On a common semiconductor wafer constituted by a PN-lamination are formed a number of semiconductor device units. Recessed grooves are formed into this wafer by an etching technique at such sites as one corresponding to the boundaries of the respective adjacent semiconductor device units. To protect the PN-junctions of the wafer exposed on the etched grooves, these surfaces are coated with a thermo-setting resin. Thereafter, the semiconductor wafer is severed apart at the respective recessed grooves into respective individual chips of semiconductor devices.
    Type: Grant
    Filed: April 5, 1978
    Date of Patent: December 25, 1979
    Assignee: Nippon Gakki Seizo Kabushiki Kaisha
    Inventors: Masao Kosugi, Takashi Ogata