Abstract: A multiprocessor system, which improves processing efficiency of an entire system while concurrently securing appropriate interrupt responsivity according to interrupt priority, includes a plurality of processors each including a register, a plurality of I/O devices, and an interrupt generation device. A multiprocessor system interrupt control method includes: setting, for the register, interrupt permissibility indicating permissibility for an interrupt to be permitted by a corresponding processor; receiving an interrupt request from one of the I/O devices, using the interrupt generation device having a memory which holds the interrupt priority indicating the priority for the interrupt from each I/O device, and notifying the interrupt request from I/O device and the interrupt priority to the plurality of processors; and causing one of the processors that includes the register holding interrupt permissibility lower than the interrupt priority to accept the interrupt request.