Patents by Inventor Takashi Ohzone

Takashi Ohzone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5250455
    Abstract: A nonvolatile semiconductor memory comprising a silicon semiconductor substrate and formed thereon a gate insulating film, wherein an ion belonging to the same Group IV in the periodic table as the ion of said silicon semiconductor substrate belongs is shot into said gate insulating film by ion implantation in a dose of not less than 10.sup.16 cm.sup.-2 to form an ion-implanted region therein in such a way that a peak of impurity density of the ion is present at the gate insulating film side from the interface between said semiconductor substrate and said gate insulating film.Also disclosed are an MOS integrated circuit comprising the nonvolatile semiconductor memory, and a method of making the nonvolatile semiconductor memory.
    Type: Grant
    Filed: June 18, 1992
    Date of Patent: October 5, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Ohzone, Takashi Hori
  • Patent number: 5057444
    Abstract: A method of fabricating a semiconductor device comprising a step of forming a trench selectively on a semiconductor substrate, a step of positioning said semiconductor substrate to a first position inclined to a plane vertical to ion beams, a step of injecting ions by emitting ion beams to a side-wall of the trench of the semiconductor substrate at the first position, a step of positioning said semiconductor substrate to a second position which is different from the first position by rotating it, and a step of injecting ions by emitting ion beams to a side-wall of the trench of the semiconductor substrate at the second position.
    Type: Grant
    Filed: January 19, 1990
    Date of Patent: October 15, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Genshu Fuse, Takashi Ohzone
  • Patent number: 4918027
    Abstract: A method of fabricating a semiconductor device comprising a step of forming a trench on a semiconductor substrate, a step of positioning the semiconductor substrate in a first position such that the direction of the ion beams is inclined to a plane which is perpendicular to the principal surface of the semiconductor substrate and which is parallel to a first side-wall of the trench, a step of implanting ions into the first side-wall by emitting ion beams onto the first side-wall of the trench of the semiconductor substrate at the first position, a step of rotating the semiconductor substrate about an axis perpendicular to the principal surface thereof to a second position which is different from the first position, a step of implanting ions into a second side-wall by emitting ion beams onto the second side-wall of the trench of the semiconductor substrate at the second position, a step of rotating the semiconductor substrate about the axis to a third position which is different from the first and second posit
    Type: Grant
    Filed: April 27, 1988
    Date of Patent: April 17, 1990
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Genshu Fuse, Takashi Ohzone
  • Patent number: 4861729
    Abstract: A method in which in order to dope impurities, with excellent controllability, into a sidewall of a trench formed in a semiconductor substrate, plasma is generated in a gas including the impurities and the semiconductor substrate is disposed in or near the plasma, so that the impurities may be doped into the sidewall of the trench uniformly and at high precision of concentration control; wherein one of a duluted B.sub.2 H.sub.6 gas and diluted AsH.sub.3 gas is chosen as the gas of the plasma, whereby one of B and As as the impurities directly enters the sidewall of the trench without first passing through a film.
    Type: Grant
    Filed: August 24, 1987
    Date of Patent: August 29, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Genshu Fuse, Takashi Hirao, Takashi Ohzone
  • Patent number: 4261792
    Abstract: A metallization or conductor or semiconductor layer formed over one major surface of a semiconductor wafer subjected to anodizing to form an anodized coating which has excellent adherence to the conductor or semiconductor layer and which is used as an etching mask when the conductor or semiconductor layer is etched.
    Type: Grant
    Filed: August 9, 1978
    Date of Patent: April 14, 1981
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiko Tsuji, Takashi Ohzone, Shigetoshi Takayanagi
  • Patent number: RE37228
    Abstract: A method of fabricating a semiconductor device comprising a step of forming a trench selectively on a semiconductor substrate, a step of positioning said semiconductor substrate to a first position inclined to a plane vertical to ion beams, a step of injecting ions by emitting ion beams to a side-wall of the trench of the semiconductor substrate at the first position, a step of positioning said semiconductor substrate to a second position which is different from the first position by rotating it, and a step of injecting ions by emitting ion beams to a side-wall of the trench of the semiconductor substrate at the second position.
    Type: Grant
    Filed: October 15, 1993
    Date of Patent: June 12, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Genshu Fuse, Takashi Ohzone