Patents by Inventor Takashi Osako

Takashi Osako has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200243613
    Abstract: Disclosed are an organic EL display panel and a method of manufacturing an organic EL display panel including a display element array having a plurality of pixels arranged in a form of a matrix. An organic EL display panel includes: a substrate; a planarizing layer; an organic electro luminescence element array; an electrode plate; a plurality of sealing members; and a sealing layer. The method of manufacturing an organic EL display panel includes: preparing a substrate; forming a planarizing layer; forming a plurality of pixel electrodes, and forming an electrode plate; forming sealing members; forming functional layers; forming a common electrode; and forming a sealing layer on the common electrode.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 30, 2020
    Applicant: JOLED Inc.
    Inventors: Kenichi NENDAI, Takashi OSAKO, Kenji KOKUDA
  • Patent number: 10644092
    Abstract: A display panel includes a contact area which includes an upper conductive layer forming first electrodes of the organic EL elements, a lower conductive layer disposed below the upper conductive layer, a middle layer between the upper conductive layer and the lower conductive layer, and an insulating layer between the lower conductive layer and the middle layer. The middle layer includes a first area and a second area which are conductive and electrically connected to the upper conductive layer, and an insulating separating area which separates the first area and the second area. The lower conductive layer includes a first line which is electrically connected to the first area via a first contact hole, and a second line which is electrically connected to the second area via a second contact hole.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: May 5, 2020
    Assignee: JOLED INC.
    Inventors: Kenji Kokuda, Masafumi Matsui, Hitoshi Tsuge, Takashi Osako, Shigeo Homura, Ryoichi Yasuda
  • Publication number: 20190115413
    Abstract: A display panel includes a contact area which includes an upper conductive layer forming first electrodes of the organic EL elements, a lower conductive layer disposed below the upper conductive layer, a middle layer between the upper conductive layer and the lower conductive layer, and an insulating layer between the lower conductive layer and the middle layer. The middle layer includes a first area and a second area which are conductive and electrically connected to the upper conductive layer, and an insulating separating area which separates the first area and the second area. The lower conductive layer includes a first line which is electrically connected to the first area via a first contact hole, and a second line which is electrically connected to the second area via a second contact hole.
    Type: Application
    Filed: August 2, 2018
    Publication date: April 18, 2019
    Applicant: JOLED INC.
    Inventors: Kenji KOKUDA, Masafumi MATSUI, Hitoshi TSUGE, Takashi OSAKO, Shigeo HOMURA, Ryoichi YASUDA
  • Patent number: 10229959
    Abstract: An organic electroluminescence (EL) display panel including pixels arranged in a matrix, the organic EL display panel includes: a substrate; pixel electrode layers made of a light-reflective material and arranged on the substrate in a matrix; an insulating layer provided at least above row and column outer edges of the pixel electrode layers and above inter-regions on the substrate between the row and column outer edges; an organic functional layer provided above the pixel electrode layers; and a counter electrode layer made of a light-transmissive material and is provided above the organic functional layer, wherein the organic functional layer includes light-emitting layers that are provided in regions above the pixel electrode layers where the insulating layer is not provided, the light-emitting layers causing organic electroluminescence, and the insulating layer has an optical density of 0.5 to 1.5 in a direction of the substrate when viewed in plan.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: March 12, 2019
    Assignee: JOLED INC.
    Inventors: Kaoru Abe, Takashi Osako, Kenichi Nendai
  • Patent number: 10032802
    Abstract: A display device including: a lead wiring layer pattern 207, made from metal, that extends outside a light emission region on a substrate; a passivation layer 216 covering the lead wiring layer pattern, a contact hole 216a in the passivation layer outside the light emission region; a connecting wiring layer pattern 237 that is continuous across the passivation layer, an inner circumference of the contact hole, and the lead wiring layer pattern in the contact hole; an electrically-conductive sealing layer pattern 217 on the connecting wiring layer pattern, covering a portion of the connecting wiring layer pattern in the contact hole; an electrically-conductive upper sealing layer pattern 219 covering and in contact with a portion of the sealing layer pattern; and a contact prevention layer pattern 218, 236 between the electrically-conductive upper sealing layer pattern and a periphery of the sealing layer pattern.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: July 24, 2018
    Assignee: JOLED INC.
    Inventors: Yasuharu Shinokawa, Kenichi Nendai, Takashi Osako
  • Patent number: 10020323
    Abstract: A display device including: a lead wiring layer pattern 207, made from metal, that extends outside a region 10A on a substrate in which a light-emitter is present; a passivation layer 216; a contact hole 216a in the passivation layer 216 outside the region 10A in a position over the lead wiring layer pattern 207 in plan view; a connecting wiring layer pattern 237 that is continuous across the passivation layer 216, an inner circumference of the contact hole 216a, and the lead wiring layer pattern 207 in the contact hole 216a; a sealing layer 217 covering a portion of the connecting wiring layer pattern 237 in the contact hole 216a; and an upper sealing layer pattern 219 covering the sealing layer pattern 217 that is above the connecting wiring layer pattern 237.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: July 10, 2018
    Assignee: JOLED INC.
    Inventors: Yasuharu Shinokawa, Kenichi Nendai, Takashi Osako
  • Publication number: 20180047798
    Abstract: An organic electroluminescence (EL) display panel including pixels arranged in a matrix, the organic EL display panel includes: a substrate; pixel electrode layers made of a light-reflective material and arranged on the substrate in a matrix; an insulating layer provided at least above row and column outer edges of the pixel electrode layers and above inter-regions on the substrate between the row and column outer edges; an organic functional layer provided above the pixel electrode layers; and a counter electrode layer made of a light-transmissive material and is provided above the organic functional layer, wherein the organic functional layer includes light-emitting layers that are provided in regions above the pixel electrode layers where the insulating layer is not provided, the light-emitting layers causing organic electroluminescence, and the insulating layer has an optical density of 0.5 to 1.5 in a direction of the substrate when viewed in plan.
    Type: Application
    Filed: August 9, 2017
    Publication date: February 15, 2018
    Applicant: JOLED INC.
    Inventors: Kaoru ABE, Takashi OSAKO, Kenichi NENDAI
  • Publication number: 20170084632
    Abstract: A display device including: a lead wiring layer pattern 207, made from metal, that extends outside a region 10A on a substrate in which a light-emitter is present; a passivation layer 216; a contact hole 216a in the passivation layer 216 outside the region 10A in a position over the lead wiring layer pattern 207 in plan view; a connecting wiring layer pattern 237 that is continuous across the passivation layer 216, an inner circumference of the contact hole 216a, and the lead wiring layer pattern 207 in the contact hole 216a; a sealing layer 217 covering a portion of the connecting wiring layer pattern 237 in the contact hole 216a; and an upper sealing layer pattern 219 covering the sealing layer pattern 217 that is above the connecting wiring layer pattern 237.
    Type: Application
    Filed: April 23, 2015
    Publication date: March 23, 2017
    Inventors: Yasuharu SHINOKAWA, Kenichi NENDAI, Takashi OSAKO
  • Publication number: 20170062479
    Abstract: A display device including: a lead wiring layer pattern 207, made from metal, that extends outside a light emission region on a substrate; a passivation layer 216 covering the lead wiring layer pattern, a contact hole 216a in the passivation layer outside the light emission region; a connecting wiring layer pattern 237 that is continuous across the passivation layer, an inner circumference of the contact hole, and the lead wiring layer pattern in the contact hole; an electrically-conductive sealing layer pattern 217 on the connecting wiring layer pattern, covering a portion of the connecting wiring layer pattern in the contact hole; an electrically-conductive upper sealing layer pattern 219 covering and in contact with a portion of the sealing layer pattern; and a contact prevention layer pattern 218, 236 between the electrically-conductive upper sealing layer pattern and a periphery of the sealing layer pattern.
    Type: Application
    Filed: April 23, 2015
    Publication date: March 2, 2017
    Inventors: Yasuharu SHINOKAWA, Kenichi NENDAI, Takashi OSAKO
  • Patent number: 9566774
    Abstract: A display panel manufacturing method is provided. A display function unit is provided on a surface of a first substrate. Sealing material is provided in a region on the surface of the first substrate that is surrounding the display function unit. Resin is then placed in an inside region of the sealing material over the surface of the first substrate. A total volume amount of the resin placed is greater than a volume capacity of an open space surrounded by the sealing material above the surface of the first substrate. A second substrate is bonded with the first substrate via the sealing material to provide a closed space with the resin being provided in the closed space.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: February 14, 2017
    Assignee: JOLED INC.
    Inventor: Takashi Osako
  • Patent number: 9244329
    Abstract: A light deflector which deflects incident light and emits the deflected light, by changing a refractive index of a liquid crystal: a pair of ITO films; a plurality of prisms which are provided between the pair of transparent electrodes and are arranged on a facing surface of one of the pair of transparent electrodes, the facing surface facing a surface of the other one of the pair of transparent electrodes; two spacers arranged between the pair of transparent electrodes, and having, in a direction from one of the pair of transparent electrodes toward the other, widths which (i) are greater than widths of the prisms and (ii) are identical to each other; and a liquid crystal which is provided, within a space between the pair of transparent electrodes, in a portion other than a portion where the prisms and the two spacers exist.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: January 26, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Shinichi Shikii, Takashi Osako
  • Patent number: 9245930
    Abstract: A method of manufacturing a display panel includes: a first step of forming a partition wall layer above a substrate; a second step of exposing the partition wall layer using a first photomask that has a mask pattern corresponding to a blue opening; a third step of exposing the partition wall layer using a second photomask that has a mask pattern corresponding to a red opening and a green opening; a fourth step of forming a partition wall by removing the partition wall layer to form the red opening, the green opening , and the blue opening in the partition wall layer; and a fifth step of forming a light emitting layer in each opening.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: January 26, 2016
    Assignee: JOLED INC.
    Inventor: Takashi Osako
  • Patent number: 9111892
    Abstract: A organic EL display panel includes an inter-layer insulation film, a pixel electrode, auxiliary wiring, a partition layer, an organic light-emitting layer, and a common electrode. The inter-layer insulation film has at least one paired concave portion and non-concave portion disposed in a region over the auxiliary wiring, a top face of the concave portion being concave with respect to a top face of the non-concave portion, and the auxiliary wiring includes a part over the concave portion and a part over the non-concave portion, a top face of the part over the concave portion being concave with respect to a top face of the part over the non-concave portion.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: August 18, 2015
    Assignee: JOLED INC.
    Inventors: Kenichi Nendai, Takashi Osako, Naoko Mizusaki
  • Patent number: 9105231
    Abstract: A display device includes: a power supplying unit which outputs at least one of a high-side output potential and a low-side output potential; a display unit in which pixels are arranged in a matrix and which receives power supply from the power supplying unit; a monitor wire arranged along a column direction of the pixels in the matrix, which has one end connected to at least one pixel inside the display unit, and is for transmitting the high-side potential to be applied to the pixel; and a voltage regulating unit connected to the other end of the monitor wire, which regulates at least one of the high-side output potential and the low-side output potential to be outputted by the power supplying unit, to set a potential difference between the high-side potential and the low-side potential to a predetermined potential difference.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: August 11, 2015
    Assignee: JOLED INC.
    Inventors: Kouhei Ebisuno, Toshiyuki Kato, Yasuo Segawa, Shinya Ono, Yosuke Izawa, Takashi Osako
  • Patent number: 9093659
    Abstract: A method of fabricating a display panel apparatus, includes forming a TFT layer, forming a planarizing film, forming a lower electrode, an electrode plate, and an auxiliary electrode, forming banks, forming the organic EL layer, and forming an upper electrode. The electrode plate has an opening exposing a portion of a surface of the planarizing film. In at least one of the forming of the lower electrode, the electrode plate and the auxiliary electrode, and the forming of the banks, the opening of the electrode plate outgasses the planarizing film. The electrode plate has a power supply that receives current through the electrode plate. The opening extends in parallel with a side of the display near the opening. Current flowing between the power supply and a portion connecting the auxiliary electrode and the electrode plate flows along an extending direction of the opening.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: July 28, 2015
    Assignee: JOLED INC.
    Inventors: Takashi Osako, Shinya Ono, Seiji Nishiyama
  • Patent number: 9049784
    Abstract: A flexible display includes: a display panel which is flexible; and a flexible circuit board which is disposed on a side of the display panel and includes an integrated circuit element provided on a surface thereof and an opening portion. The opening portion is in a shape extending in a second direction vertical to a first direction which is parallel to the side of the display panel to which the flexible circuit board is connected, and the integrated circuit element and the opening portion are arranged in the first direction.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: June 2, 2015
    Assignee: JOLED INC.
    Inventor: Takashi Osako
  • Publication number: 20150111331
    Abstract: A method of fabricating a display panel apparatus, includes forming a TFT layer, forming a planarizing film, forming a lower electrode, an electrode plate, and an auxiliary electrode, forming banks, forming the organic EL layer, and forming an upper electrode. The electrode plate has an opening exposing a portion of a surface of the planarizing film. In at least one of the forming of the lower electrode, the electrode plate and the auxiliary electrode, and the forming of the banks, the opening of the electrode plate outgasses the planarizing film. The electrode plate has a power supply that receives current through the electrode plate. The opening extends in parallel with a side of the display near the opening. Current flowing between the power supply and a portion connecting the auxiliary electrode and the electrode plate flows along an extending direction of the opening.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 23, 2015
    Applicant: PANASONIC CORPORATION
    Inventors: Takashi OSAKO, Shinya ONO, Seiji NISHIYAMA
  • Publication number: 20150050445
    Abstract: A display panel manufacturing method includes: preparing a first substrate having a main surface on a part of which a display function unit is formed; forming a sealing material in a region surrounding the display function unit of the main surface of the first substrate; placing a resin in an inside region of the sealing material on the main surface of the first substrate, the resin being placed in an amount ?vr that is greater than a capacity v of an open space surrounded by the sealing material above the main surface of the first substrate; and bonding the first substrate and a second substrate via the sealing material.
    Type: Application
    Filed: July 23, 2013
    Publication date: February 19, 2015
    Applicant: PANASONIC CORPORATION
    Inventor: Takashi Osako
  • Patent number: 8956965
    Abstract: A method of manufacturing a display panel having a display part and a terminal part each formed on a different area on a TFT substrate, comprising: a step of forming the display part on the TFT substrate; a step of forming a conductive layer of a conductive metal oxide or a metal on an area where the terminal part is to be formed; a step of forming a chemical vapor deposition layer of an inorganic compound by a chemical vapor deposition method so that the chemical vapor deposition layer covers the display part and comes into contact at least with an upper surface of the conductive layer and so that the upper surface of the conductive layer alters; and a step of removing a portion of the chemical vapor deposition layer on the conductive layer.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: February 17, 2015
    Assignee: Panasonic Corporation
    Inventor: Takashi Osako
  • Patent number: 8952609
    Abstract: A display panel apparatus has a structure which is less likely to seal a planarizing film even when an electrode plate is provided on the planarizing film, and the display panel apparatus includes: a planarizing film formed on a substrate; a pixel formed on the planarizing film and including: a lower electrode; an organic layer; and an upper electrode; an auxiliary electrode electrically insulated from the lower electrode and electrically connected to the upper electrode; a display section including a plurality of the pixels; an electrode plate electrically connected to the auxiliary electrode and arranged to cover the planarizing film outside the display section; and a power supply section electrically connected to the electrode plate, and the electrode plate has a hole exposing a part of a surface of the planarizing film.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: February 10, 2015
    Assignee: Panasonic Corporation
    Inventors: Takashi Osako, Shinya Ono, Seiji Nishiyama