Patents by Inventor Takashi Sase

Takashi Sase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6879137
    Abstract: A step down type DC-DC power-supply device implements both the stabilization of the control loop and the responsibility at the same time. In the power-supply device, an output power signal is fed back to an error amplifier after having passed through a CR smoothing filter provided independently of a power LC smoothing filter. Also, independently of the duty controls over Power MOSFETs, i.e., upper-side/lower-side semiconductor switching components in the steady state, an output from the power LC smoothing filter is added to an upper and lower limit-mode-equipped control circuit, thereby, at the transient state, forcefully setting the duty ? at either 0% or 100%.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: April 12, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Sase, Koji Tateno, Akihiko Kanouda, Katsunori Hayashi, Shinichi Yoshida
  • Publication number: 20050029997
    Abstract: A step-down type DC-DC power-supply device implements both the stabilization of the control loop and the responsibility at the same time. In the power-supply device, an output power signal is fed back to an error amplifier after having passed through a CR smoothing filter provided independently of a power LC smoothing filter. Also, independently of the duty controls over Power MOSFETs, i.e., upper-side/lower-side semiconductor switching components in the steady state, an output from the power LC smoothing filter is added to an upper and lower limit-mode-equipped control circuit, thereby, at the transient state, forcefully setting the duty ? at either 0% or 100%.
    Type: Application
    Filed: September 10, 2004
    Publication date: February 10, 2005
    Inventors: Takashi Sase, Koji Tateno, Akihiko Kanouda, Katsunori Hayashi, Shinichi Yoshida
  • Patent number: 6798180
    Abstract: A step-down type DC—DC power-supply device implements both the stabilization of the control loop and the responsibility at the same time. In the power-supply device, an output power signal is fed back to an error amplifier after having passed through a CR smoothing filter provided independently of a power LC smoothing filter. Also, independently of the duty controls over Power MOSFETs, i.e., upper-side/lower-side semiconductor switching components in the steady state, an output from the power LC smoothing filter is added to an upper and lower limit-mode-equipped control circuit, thereby, at the transient state, forcefully setting the duty &agr; at either 0% or 100%.
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: September 28, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Sase, Koji Tateno, Akihiko Kanouda, Katsunori Hayashi, Shinichi Yoshida
  • Publication number: 20040004470
    Abstract: There is provided a switching power supply device of hysteresis current mode control system which assures excellent response characteristic for change of output current and reduction of power consumption. In a switching regulator of hysteresis current mode control system, a sense resistor connected in series to a coil is eliminated, a serially connected resistor and a capacitor are connected in parallel to a coil in place of such sense resistor. Thereby, a potential of a connection node of these resistor and capacitor is inputted to a comparator circuit having the hysteresis characteristic for comparison with the reference voltage. Accordingly, a switch may be controlled for ON and OFF states.
    Type: Application
    Filed: June 3, 2003
    Publication date: January 8, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Shinichi Yoshida, Tomohiro Tazawa, Takashi Sase, Kouji Tateno
  • Publication number: 20030231010
    Abstract: A step-down type DC-DC power-supply device implements both the stabilization of the control loop and the responsibility at the same time. In the power-supply device, an output power signal is fed back to an error amplifier after having passed through a CR smoothing filter provided independently of a power LC smoothing filter. Also, independently of the duty controls over Power MOSFETs, i.e., upper-side/lower-side semiconductor switching components in the steady state, an output from the power LC smoothing filter is added to an upper and lower limit-mode-equipped control circuit, thereby, at the transient state, forcefully setting the duty &agr; at either 0% or 100%.
    Type: Application
    Filed: June 17, 2003
    Publication date: December 18, 2003
    Inventors: Takashi Sase, Koji Tateno, Akihiko Kanouda, Katsunori Hayashi, Shinichi Yoshida
  • Publication number: 20030117751
    Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
    Type: Application
    Filed: February 4, 2003
    Publication date: June 26, 2003
    Applicant: HITACHI, LTD.
    Inventors: Fumio Murabayashi, Takashi Sase, Mutsumi Kikuchi, Atsuo Watanabe, Masatsugu Amishiro, Kenji Tabuchi
  • Patent number: 6563200
    Abstract: In an interface device in which by means of a buried insulation film 412 and a region insulation portion 410 an SOI substrate 414 is divided into a semiconductor support substrate region 411, a controller side region 407 and a network side region 408 and a part of isolator circuits 405 and 406 making use of a static capacitance are formed in the network side region 408, the semiconductor support substrate region 411 and the network side region 408 are connected to a network power source to always keep these regions at a same potential, thereby, an interface device using a dielectric isolation substrate which suppresses erroneous operations due to noises and characteristic deterioration, and a system using the same are provided.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: May 13, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Kikuchi, Fumio Murabayashi, Takashi Sase, Atsuo Watanabe, Masatsugu Amishiro
  • Patent number: 6437621
    Abstract: A waveform shaping circuit is provided so that the duty factor of clock pulses can be set to 50% with high accuracy even if the clock pulses are of a low voltage and a high frequency. An inverter which receives the clock pulses through an alternating current coupling capacitor is provided with a non-linear limiter element for limiting an amplitude of an output symmetrically on positive and negative sides thereof. A first current-limiting impedance and a second current-limiting impedance are connected between a power supply side terminal of the inverter and a power supply bus and between a grounding side terminal of the inverter and a grounding bus, respectively.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: August 20, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Kato, Takashi Sase, Takashi Hotta, Fumio Murabayashi
  • Publication number: 20020105062
    Abstract: In an interface device in which by means of a buried insulation film 412 and a region insulation portion 410 an SOI substrate 414 is divided into a semiconductor support substrate region 411, a controller side region 407 and a network side region 408 and a part of isolator circuits 405 and 406 making use of a static capacitance are formed in the network side region 408, the semiconductor support substrate region 411 and the network side region 408 are connected to a network power source to always keep these regions at a same potential, thereby, an interface device using a dielectric isolation substrate which suppresses erroneous operations due to noises and characteristic deterioration, and a system using the same are provided.
    Type: Application
    Filed: August 29, 2001
    Publication date: August 8, 2002
    Inventors: Mutsumi Kikuchi, Fumio Murabayashi, Takashi Sase, Atsuo Watanabe, Masatsugu Amishiro
  • Patent number: 6377480
    Abstract: In a switching power source comprising a triangular wave generating circuit and an error amplifier and a PWM comparator, in normal time PWM pulses being obtained by comparing an output amplitude of triangular wave of the triangular wave generating circuit with an output voltage of the error amplifier as a reference voltage using the PWM comparator, the soft-start circuit of the switching power source comprises a soft-start reference value setting part composed of a group of resistance networks and a group of switches using the same structure as an upper-and-lower limit setting part, composed of networks and switches, for setting an upper and a lower limits of the amplitude of triangular wave of the triangular generating circuit; and a counting circuit for counting cycles of the triangular wave of the triangular wave generating circuit to obtain a plurality of arbitrary soft-start timings in order to switch the group of switches.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: April 23, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Sase, Fumio Murabayashi, Mutsumi Kikuchi
  • Publication number: 20010017560
    Abstract: An object of the present invention is to provide a waveform shaping circuit by which the duty factor of clock pulses can be set to 50% with high accuracy even if the clock pulses are of a low voltage and a high frequency.
    Type: Application
    Filed: March 26, 2001
    Publication date: August 30, 2001
    Inventors: Kazuo Kato, Takashi Sase, Takashi Hotta, Fumio Murabayashi
  • Patent number: 5757233
    Abstract: The present invention relates to a complementary transistor circuit and, an amplifier using it, and in particular, to a video amplifier for amplifying video signals and a high-definition CRT display device. In amplifying inputted video signals by using a multiplexer, a gain controller and a current mirror amplifier, each element circuit is formed by using complementary transistor circuits. Circuit simplification is thus attained. In addition, higher precision and band broadening has been realized owing to adoption of a current operation. Further, the present invention makes it possible to eliminate direct from the high voltage output completely by providing a low-voltage output circuit for feedback having a similar relationship with respect to the high-voltage video output stage of the video amplifier, thereby performing negative feedback via a sample-and-hold circuit. This also serves to broaden the bandwidth and reduce power dissipation.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 26, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Kato, Hideo Sato, Takashi Sase, Kenkichi Yamashita
  • Patent number: 5724519
    Abstract: The present invention relates to a complementary transistor circuit and an amplifier using it, and, in particular, to a video amplifier for amplifying video signals and a high-definition CRT display device. In amplifying inputted video signals by using a multiplexer, a gain controller and a current mirror amplifier, each element circuit is formed by using complementary transistor circuits. Circuit simplification is thus attained. In addition, higher precision and band broadening has been realized owing to adoption of a current operation. Further, the present invention makes it possible to eliminate direct feedback from the high voltage output completely by providing a low-voltage output circuit for feedback having a similar relationship with respect to the high-voltage video output stage of the video amplifier, thereby performing negative feedback via a sample-and-hold circuit. This also serves to broaden the bandwidth and reduce power dissipation.
    Type: Grant
    Filed: February 15, 1990
    Date of Patent: March 3, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Kato, Hideo Sato, Takashi Sase, Kenkichi Yamashita
  • Patent number: 5631517
    Abstract: An electrostrictive revolution type ultrasonic motor includes a piezoelectric ceramic disk shaped stator and a rotor. The piezoelectric ceramic disk shaped stator has an eccentric movement via excitation by two phase pulse like voltage. The rotor is fitted around the circumference of the stator and is transmitted by a rotating torque due to the eccentric movement via frictional contact therebetween. The rotor is formed of a plastic material by injection molding to achieve a reduction of a size variation of the rotor and a stable contact with the stator. A high and stable rotating torque is thereby obtained with a reduced production cost. Further, a driving device for the ultrasonic motor which varies the frequency of a voltage applied to the ultrasonic motor in a stepped manner discriminates the magnitude of the corresponding motor currents and drives the ultrasonic motor with the frequency which causes the maximum motor current.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: May 20, 1997
    Assignees: Hitachi, Ltd., Hitachi Media Electronics Co. Ltd.
    Inventors: Kazuo Kato, Takashi Sase, Kikuo Tomita, Shuzo Oshima, Muneo Chiba, Tomohiko Douken, Kazuyoshi Takizawa
  • Patent number: 5459378
    Abstract: A CRT display apparatus equipped with a control apparatus for performing a focusing control and a brightness control by changing a grid voltage by means of a potentiometer. The control apparatus includes a motor for driving the potentiometer in response to an externally supplied control signal, and the motor is mechanically arranged with the potentiometer in an integrated form. Both of a plurality of potentiometers and motors for driving the plural potentiometers are formed on the same substrate in an integrated form. Also, the control apparatus is molded with a flyback transformer for constituting the CRT display apparatus. The motor is constructed of either an ultrasonic motor, or a plastic geared motor.
    Type: Grant
    Filed: August 24, 1993
    Date of Patent: October 17, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Kato, Takashi Sase, Fumio Tajima, Tomohiko Douken
  • Patent number: 4774480
    Abstract: A PLL comprising a phase comparator circuit for detecting the phase of a pulse signal based upon the input signal and the phase of a pulse signal based upon the output signal, a smoothing filter for smoothing the output of the phase comparator circuit, a loop filter for controlling the oscillation frequency on the basis of the smoothing filter, and a voltage controlled oscillator circuit for sending out the output signal having a frequency corresponding to the voltage based upon the output of the loop filter. Since the smoothing filter is separated from the loop filter, time constants of the smoothing filter and the loop filter can be set independently and with precision. If the time constant of the smoothing filter is chosen to be extremely small, for example, the time constant of the phase-locked loop is defined by the time constant of the loop filter. It is thus possible to define the time constant of the phase-locked loop by only selecting the time constant of the loop filter.
    Type: Grant
    Filed: February 26, 1987
    Date of Patent: September 27, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Sato, Kazuo Kato, Takashi Sase, Kenichi Onda, Ichiro Ikushima
  • Patent number: 4749961
    Abstract: A voltage controlled oscillator is provided which includes a pair of gain stages constituting a positive feedback path, a pair of buffer stages in cross connection with the gain stages, a pair of loads connected with the corresponding gain stages, each having a parallel connection of an active device resistor and a clamping diode, and a pair of voltage controlled current sources connected with the corresponding gain stages, for supplying constant currents to the gain stages. A timing capacitor is connected with the input sides of both voltage controlled current sources, and is charged or discharged by the constant currents from the current sources.
    Type: Grant
    Filed: March 26, 1987
    Date of Patent: June 7, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Kato, Takashi Sase, Hideo Sato, Kenichi Onda, Ichiro Ikushima
  • Patent number: 4396890
    Abstract: A variable gain amplifier includes an amplifier for amplifying an input signal, a switch controlled with a given duty factor and a smoothing filter connected to the switch. The filter and the switch constitutes a negative feedback loop for the amplifier of which amplification factor is variably controlled by varying the duty factor of the switch.
    Type: Grant
    Filed: May 5, 1980
    Date of Patent: August 2, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Kato, Takao Sasayama, Takashi Sase
  • Patent number: 4178554
    Abstract: There is provided a pair of flip-flops, each of which is set before appearance of every one of two input signals to be compared. One of the input signals is applied to a reset terminal of the first flip-flop through an inverter, and the other input signal to that of the second flip-flop through another inverter. There is further provided a pair of AND gates. A set output of the first flip-flop is led to one of two input terminals of the first AND gate through a delay element, and a reset output of the second flip-flop is connected to the other input terminal of the first AND gate directly. The set output of the output of the second flip-flop is coupled to one of two input terminals of the second AND gate through another delay element and the reset output of the first flip-flop is connected to the other input terminal second AND gate directly.
    Type: Grant
    Filed: October 25, 1977
    Date of Patent: December 11, 1979
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Sase, Kazuo Katoh, Takeshi Hirayama
  • Patent number: 4086541
    Abstract: A time division multiplexing amplifier having a differential amplifier, such as a dynamic bridge amplifier, which has a predetermined gain accurately provided by means of operational network resistors. The differential amplifier is used to amplify differential signals containing a common-mode voltage. Prior to amplification of the differential signals, a common-mode voltage is applied in common to two input terminals of the differential amplifier, and then the differential amplifier is adjusted to provide a zero offset voltage. After that, the differential signals are applied to the differential amplifier, so that the differential signals can be amplified without having any adverse effect of a common-mode voltage.
    Type: Grant
    Filed: December 13, 1976
    Date of Patent: April 25, 1978
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Katou, Takashi Sase, Ikuho Horinaka