Abstract: A metal foil is provided with a filler-containing resin layer that is thin and has a smooth surface as a metal foil provided with an insulating layer. The filler-containing resin layer having a thickness of 0.1 ?m to 3.0 ?M, the gloss at the surface of the filler-containing resin layer is 200 or more, and the surface roughness (Ra) measured by an atomic force microscope in a measurement area of 5 ?m×5 ?M on the filler-containing resin layer is 25 nm or less is stacked on the smooth surface of the metal foil having a gloss exceeding 400 and surface roughness (Ra) measured by an atomic force microscope in a measurement area of 5 ?m×5 ?m of 10 nm or less.

Abstract: A metal foil is provided with a filler-containing resin layer that is thin and has a smooth surface as a metal foil provided with an insulating layer. The filler-containing resin layer having a thickness of 0.1 ?m to 3.0 ?M, the gloss at the surface of the filler-containing resin layer is 200 or more, and the surface roughness (Ra) measured by an atomic force microscope in a measurement area of 5 ?m×5 ?M on the filler-containing resin layer is 25 nm or less is stacked on the smooth surface of the metal foil having a gloss exceeding 400 and surface roughness (Ra) measured by an atomic force microscope in a measurement area of 5 ?m×5 ?m of 10 nm or less.

Abstract: The present invention relates to a double-sided copper-clad laminate for forming a capacitor layer, formed by adhering electrodeposited copper foils on the both sides of a dielectric layer of a thickness of 10 ?m or less, and the object of the present invention is to secure good voltage resistant proprieties. For the double-sided copper-clad laminate of the present invention uses an electrodeposited copper foil provided with a matte side to be joined to the dielectric layer prepared by physically polishing the rough surface of an untreated electrodeposited copper foil obtained by an electrolysis method to a surface roughness (Rz) of 0.5 ?m to 3.0 ?m, and nodular treatment, and as required, passivation, silane coupling agent treatment, or the like are performed thereon. As the manufacturing method thereof, a manufacturing method wherein the surfaces of the resin layers of two electrodeposited copper foils having resin layers facing to each other are adhered, or the like.

Abstract: The present invention provides a technique which permits the withstand voltage measurement of a laminate web for capacitor layer manufactured by a continuous laminating method in a roll state wound around a core tube. The invention provides a roll of laminate for capacitor layer which is obtained by manufacturing a laminate web for capacitor layer by laminating a first electrically conductive layer, a dielectric layer and a second electrically conductive layer and winding this laminate web for capacitor layer from a start end side to a terminal end side thereof around a core tube.

Abstract: The present invention relates to a double-sided copper-clad laminate for forming a capacitor layer, formed by adhering electrodeposited copper foils on the both sides of a dielectric layer of a thickness of 10 &mgr;m or less, and the object of the present invention is to secure good voltage resistant proprieties.

Abstract: The present invention provides a technique which permits the withstand voltage measurement of a laminate web for capacitor layer manufactured by a continuous laminating method in a roll state wound around a core tube. The invention provides a roll of laminate for capacitor layer which is obtained by manufacturing a laminate web for capacitor layer by laminating a first electrically conductive layer, a dielectric layer and a second electrically conductive layer and winding this laminate web for capacitor layer from a start end side to a terminal end side thereof around a core tube.

Abstract: The object of the present invention is to provide a copper clad laminate with a copper-plated circuit layer, and a method for manufacturing a printed wiring board that excels the conventional ones in the aspect ratio of a circuit pattern when processed to a printed wiring board comprising a fine-pitch circuit. The object of the present invention is achieved by manufacturing a printed wiring board with the use of a copper clad laminate with a copper-plated circuit layer characterized by a copper-plated circuit layer and an outer-layer copper foil layer that satisfied the relationship in a case where a specific etchant is used, the R v value (Vsc/Vsp), which is the ratio of the dissolution rate (Vsp) of deposited copper that constitutes said copper-plated circuit layer to the dissolution rate (Vsc) of copper that constitutes said outer-layer copper foil layer, is 1.0 or more.

Abstract: The object of the present invention is to provide a copper clad laminate with a copper-plated circuit layer, and a method for manufacturing a printed wiring board that excels the conventional ones in the aspect ratio of a circuit pattern when processed to a printed wiring board comprising a fine-pitch circuit. The object of the present invention is achieved by manufacturing a printed wiring board with the use of a copper clad laminate with a copper-plated circuit layer characterized by a copper-plated circuit layer and an outer-layer copper foil layer that satisfied the relationship in a case where a specific etchant is used, the R v value (Vsc/Vsp), which is the ratio of the dissolution rate (Vsp) of deposited copper that constitutes said copper-plated circuit layer to the dissolution rate (Vsc) of copper that constitutes said outer-layer copper foil layer, is 1.0 or more.