Abstract: A semiconductor apparatus operates based on a first voltage, a second voltage lower than the first voltage, and a third voltage in between the first and second voltages, and includes an output circuit including at least one transistor where a signal having an amplitude ranging from the second to first voltages is input to a gate, and a control circuit that generates a first control signal controlling a gate voltage of a transistor included in the output circuit, a second control signal controlling a voltage in a back-gate region of the transistor, and a third control signal controlling a voltage in a deep well region. The control circuit sets a voltage difference between the first and second control signals to be equal to or smaller than the larger one of a voltage difference between the first and third voltages and a voltage difference between the second and third voltages.

Abstract: In a driver unit for driving a display panel and a nonvolatile memory, a level shifter circuit receives a driver control signal to generate a level-shifted driver control signal. A display panel driver circuit drives the display panel in accordance with the level-shifted driver control signal. A nonvolatile memory driver circuit drives the nonvolatile memory in accordance with the level-shifted driver control circuit. A selection circuit selects one of the display panel driver circuit and the nonvolatile memory driver circuit.

Abstract: Provided is a semiconductor device that can be reduced in size while variation in shape among circuit patterns is reduced. The semiconductor device includes multiple circuit patterns and first dummy patterns. The multiple circuit patterns are disposed at regular intervals, and are used as part of the circuit. The multiple circuit patterns consist of two outermost circuit patterns and the other inner circuit patterns. The first dummy patterns are disposed on outer sides of the two outermost circuit patterns, respectively. The distance between each of the outermost circuit patterns and the corresponding first dummy pattern is equal to a distance between any adjacent two of the circuit patterns. A width of each of the first dummy patterns is smaller than a width of any of the circuit patterns, and is equal to a minimum design rule width, for example.

Abstract: A display driver for evenly display the screen driven by a plurality of driver circuits is provided. The display apparatus includes a display panel driven by data lines and driver units. Each of the data lines is driven by the corresponding driver unit. Each of the driver units has a resistance division unit for generating grayscale voltages, an operational amplifier unit for supplying voltages to the terminals of the resistance division unit in response to a bias control signal. The corresponding terminals of the resistance division unit of the plurality of driver circuits are commonly connected. The bias control signal is supplied when each of the driver circuit drives the corresponding data line.

Abstract: A booster circuit includes first and second transistors, a first capacitor, a first drive circuit, a second capacitor, a first controller, and a second controller. The first and second transistors are connected in series between a first voltage and a second voltage. One end of the first capacitor is connected to a connection node between the first transistor and the second transistor. The first drive circuit boosts the voltage at the other end of the first capacitor. The second capacitor is connected between the second voltage and a reference voltage. The first controller controls conduction/non-conduction of the first transistor. The second controller inputs any of the first voltage and the second voltage to the second transistor, and thereby controls conduction/non-conduction of the second transistor. The boost circuit is supplied with the reference voltage, a supply voltage, and a boost clock signal, and generates the second voltage by boosting the supply voltage.

Abstract: A power supply circuit includes a control circuit which outputs a control signal when an in-rush current flows and a power-supply-resistance control circuit which supplies a current to a capacitive load. The power-supply-resistance control circuit, provided in the current path between a power supply and the capacitive load, increases the resistance of the current path in response to the control signal and reduces the resistance of the current path in response to a stop page of the control signal, whereby the control signal is output or stopped so that the in-rush current is suppressed to a value smaller than or equal to a given value.

Abstract: A booster power supply circuit includes a booster boosting an input voltage to output an boosted voltage for applying said boosted voltage to a first smoothing capacitor and a controller controlling a transfer destination and an amount of transfer of a charge in the first smoothing capacitor at a transition from an operation mode to a standby mode.

Abstract: A power supply circuit for display unit according to one embodiment of the present invention includes a power supply circuit having outputs connected to a plurality of capacitance elements and supplying power to a plurality of drivers, and a controller switching connection of the power supply circuit and the capacitance elements depending on a use mode. The use mode includes a first use mode connecting one terminals of the capacitance elements to the power supply circuit or ground potential and a second use mode connecting one ends of the capacitance elements to the power supply circuit or floating one terminals of the capacitance elements.

Abstract: A semiconductor apparatus operates based on a first voltage, a second voltage lower than the first voltage, and a third voltage in between the first and second voltages, and includes an output circuit including at least one transistor where a signal having an amplitude ranging from the second to first voltages is input to a gate, and a control circuit that generates a first control signal controlling a gate voltage of a transistor included in the output circuit, a second control signal controlling a voltage in a back-gate region of the transistor, and a third control signal controlling a voltage in a deep well region. The control circuit sets a voltage difference between the first and second control signals to be equal to or smaller than the larger one of a voltage difference between the first and third voltages and a voltage difference between the second and third voltages.

Abstract: A power supply circuit for a display apparatus, includes: a voltage boosting circuit configured to boost up an input voltage based on a voltage boosting factor to output a boosted output voltage; a voltage detecting circuit configured to compare a voltage level of a power supply voltage to which the input voltage is related and a predetermined voltage level; and a control circuit configured to output one of a first voltage boosting factor and a second voltage boosting factor as the voltage boosting factor to the voltage boosting circuit based on the comparison result. The control circuit changes the voltage boosting factor during a blanking period in a display panel.

Abstract: A booster circuit includes first and second transistors, a first capacitor, a first drive circuit, a second capacitor, a first controller, and a second controller. The first and second transistors are connected in series between a first voltage and a second voltage. One end of the first capacitor is connected to a connection node between the first transistor and the second transistor. The first drive circuit boosts the voltage at the other end of the first capacitor. The second capacitor is connected between the second voltage and a reference voltage. The first controller controls conduction/non-conduction of the first transistor. The second controller inputs any of the first voltage and the second voltage to the second transistor, and thereby controls conduction/non-conduction of the second transistor. The boost circuit is supplied with the reference voltage, a supply voltage, and a boost clock signal, and generates the second voltage by boosting the supply voltage.

Abstract: Provided is a semiconductor device that can be reduced in size while variation in shape among circuit patterns is reduced. The semiconductor device includes multiple circuit patterns and first dummy patterns. The multiple circuit patterns are disposed at regular intervals, and are used as part of the circuit. The multiple circuit patterns consist of two outermost circuit patterns and the other inner circuit patterns. The first dummy patterns are disposed on outer sides of the two outermost circuit patterns, respectively. The distance between each of the outermost circuit patterns and the corresponding first dummy pattern is equal to a distance between any adjacent two of the circuit patterns. A width of each of the first dummy patterns is smaller than a width of any of the circuit patterns, and is equal to a minimum design rule width, for example.

Abstract: A power supply circuit includes a control circuit which outputs a control signal when an in-rush current flows and a power-supply-resistance control circuit which supplies a current to a capacitive load. The power-supply-resistance control circuit, provided in the current path between a power supply and the capacitive load, increases the resistance of the current path in response to the control signal and reduces the resistance of the current path in response to a stop page of the control signal, whereby the control signal is output or stopped so that the in-rush current is suppressed to a value smaller than or equal to a given value.

Abstract: Disclosed is a device which includes an oscillation circuit for generating a reference clock signal CLK (osc), a display counter circuit for generating from the reference clock, a frame synchronization signal CLK (frm), a line selection reference clock signal CLK (drv), and a boost operation reference clock obtained on performing frequency multiplication of the line selection reference clock signal CLK (drv), a frequency divider circuit for inputting the frame synchronization signal CLK (frm) as a reset signal thereof and performing frequency division of the boost operation reference clock to output a boost operation clock signal CLK (dcdc), a boost circuit for performing charging and discharging operations according to the boost operation clock signal CLK (dcdc), and a driver circuit supplied with the boosted voltage of the boost circuit for driving a scan line selected the line selection reference clock signal CLK (drv).

Abstract: A voltage-booster power supply circuit comprises a semiconductor IC and an external circuitry. The semiconductor IC has: first and second charge pump circuits each of which boosts a voltage by using a capacitor in response to a control signal; and a selection circuit. In a first mode, the selection circuit outputs out-of-phase first and second control signals as the control signal to the first and second charge pump circuits, respectively. The external circuitry is provided with first and second pumping capacitors that are connected as the above-mentioned capacitor to the first and second charge pump circuits, respectively. While in a second mode, the selection circuit outputs an in-phase control signal as the control signal to the first and second charge pump circuits. The external circuitry is provided with a common pumping capacitor that is connected as the above-mentioned capacitor to the first and second charge pump circuits in common.

Abstract: A power supply circuit for display unit according to one embodiment of the present invention includes a power supply circuit having outputs connected to a plurality of capacitance elements and supplying power to a plurality of drivers, and a controller switching connection of the power supply circuit and the capacitance elements depending on a use mode. The use mode includes a first use mode connecting one terminals of the capacitance elements to the power supply circuit or ground potential and a second use mode connecting one ends of the capacitance elements to the power supply circuit or floating one terminals of the capacitance elements.

Abstract: A voltage-booster power supply circuit comprises a semiconductor IC and an external circuitry. The semiconductor IC has: first and second charge pump circuits each of which boosts a voltage by using a capacitor in response to a control signal; and a selection circuit. In a first mode, the selection circuit outputs out-of-phase first and second control signals as the control signal to the first and second charge pump circuits, respectively. The external circuitry is provided with first and second pumping capacitors that are connected as the above-mentioned capacitor to the first and second charge pump circuits, respectively. While in a second mode, the selection circuit outputs an in-phase control signal as the control signal to the first and second charge pump circuits. The external circuitry is provided with a common pumping capacitor that is connected as the above-mentioned capacitor to the first and second charge pump circuits in common.

Abstract: A booster power supply circuit includes a booster boosting an input voltage to output an boosted voltage for applying said boosted voltage to a first smoothing capacitor and a controller controlling a transfer destination and an amount of transfer of a charge in the first smoothing capacitor at a transition from an operation mode to a standby mode.

Abstract: A display driver for evenly display the screen driven by a plurality of driver circuits is provided. The display apparatus includes a display panel driven by data lines and driver units. Each of the data lines is driven by the corresponding driver unit. Each of the driver units has a resistance division unit for generating grayscale voltages, an operational amplifier unit for supplying voltages to the terminals of the resistance division unit in response to a bias control signal. The corresponding terminals of the resistance division unit of the plurality of driver circuits are commonly connected. The bias control signal is supplied when each of the driver circuit drives the corresponding data line.

Abstract: In a driver unit for driving a display panel and a nonvolatile memory, a level shifter circuit receives a driver control signal to generate a level-shifted driver control signal. A display panel driver circuit drives the display panel in accordance with the level-shifted driver control signal. A nonvolatile memory driver circuit drives the nonvolatile memory in accordance with the level-shifted driver control circuit. A selection circuit selects one of the display panel driver circuit and the nonvolatile memory driver circuit.