Patents by Inventor Takashi TANIMURA

Takashi TANIMURA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240094620
    Abstract: Provided is an EUV transmissive membrane including a main layer having an EUV transmittance of 85% or more at a wavelength of 13.5 nm, wherein the main layer is composed of a monolayer or a composite layer of two or more layers, and a protective layer that covers at least one side of the main layer, wherein the protective layer includes at least one selected from the group consisting of amorphous carbon, Cu, Al, and an organic resist as a main component.
    Type: Application
    Filed: October 10, 2023
    Publication date: March 21, 2024
    Applicant: NGK INSULATORS, LTD.
    Inventors: Naoki GORIKI, Takashi TANIMURA, Toshikatsu KASHIWAYA, Hiroki CHAEN
  • Publication number: 20230305192
    Abstract: There is provided an EUV transmissive membrane having an EUV transmittance of 80.0% or more at a wavelength of 13.5 nm and including a main layer having an IR emissivity of 2.0% or more at a wavelength of 2 µm and a protective layer that covers at least one side of the main layer and has an IR transmittance of 70% or more at a wavelength of 2 µm.
    Type: Application
    Filed: May 2, 2023
    Publication date: September 28, 2023
    Applicant: NGK INSULATORS, LTD.
    Inventors: Toshikatsu KASHIWAYA, Atsuo KONDO, Hiroki CHAEN, Takashi TANIMURA, Naoki GORIKI
  • Publication number: 20230213848
    Abstract: Provided is an EUV transmissive membrane including a main layer composed of metallic beryllium and a protective layer composed of beryllium nitride that covers at least one side of the main layer.
    Type: Application
    Filed: February 24, 2023
    Publication date: July 6, 2023
    Applicant: NGK INSULATORS, LTD.
    Inventors: Toshikatsu KASHIWAYA, Atsuo KONDO, Hiroki CHAEN, Takashi TANIMURA
  • Patent number: 9583372
    Abstract: A member for semiconductor manufacturing device includes a susceptor which is a ceramic plate formed of AlN and a gas introduction pipe which is joined to the susceptor. An annular pipe joining bank is provided at a position of the susceptor facing a flange of the gas introduction pipe. In addition, a pipe brazed part is formed between the flange and the pipe joining bank. The flange has a width of 3 mm or more and a thickness of from 0.5 to 2 mm. It is preferable that the height of the pipe joining bank be 0.5 mm or more, the edge of the bank facing the outer edge of the flange. be chamfered as designated by C0.3 or more or rounded as designated by R0.3 or more.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: February 28, 2017
    Assignee: NGK Insulators, Ltd.
    Inventors: Takashi Kataigi, Takashi Tanimura
  • Publication number: 20160099164
    Abstract: A member for semiconductor manufacturing device includes a susceptor 10 which is a ceramic plate formed of AlN and a gas introduction pipe 20 which is joined to the susceptor 10. An annular pipe joining bank 14 is provided at a position of the susceptor 10 facing a flange 22 of the gas introduction pipe 20. In addition, a pipe brazed part 24 is formed between the flange 22 and the pipe joining bank 14. The flange 22 has a width of 3 mm or more and a thickness of from 0.5 to 2 mm. It is preferable that the height of the pipe joining bank 14 be 0.5 mm or more, the edge of the bank facing the outer edge of the flange 22 be chamfered as designated by C0.3 or more or rounded as designated by R0.3 or more.
    Type: Application
    Filed: December 10, 2015
    Publication date: April 7, 2016
    Inventors: Takashi KATAIGI, Takashi TANIMURA
  • Patent number: 9165813
    Abstract: In a semiconductor manufacturing apparatus member, paths that may become a discharge path between a wafer and a cooling device are a first path and a second path. The first path is the shortest path from a hole to a hole across a plug. The length of the first path is larger than the thickness of the plug. The second path is the shortest path that extends from one of holes to an outer peripheral surface of the plug along an adhesive layer, and the shortest path from a hole in a bonding sheet to the outer peripheral surface of the plug along the bonding sheet. The sum of the lengths of these respective paths is larger than the thickness of the plug.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: October 20, 2015
    Assignee: NGK Insulators, Ltd.
    Inventors: Takashi Kataigi, Takashi Tanimura
  • Publication number: 20130286532
    Abstract: In a semiconductor manufacturing apparatus member 10, paths that may become a discharge path between a wafer W and a cooling device 40 are a first path R1 and a second path R2. The path R1 is the shortest path from a hole 34a to a hole 42 across a plug 36. The length of the path R1 is larger than the thickness of the plug 36. The path R2 is a path that extends from one of holes 34 to an outer peripheral surface of the plug 36 along an adhesive layer 38 along the shortest path (portion R2a), then to a bonding sheet 50 along the outer peripheral surface, and to a hole 42 along the bonding sheet 50 along the shortest path (portion R2b). The sum of the lengths of these portions (R2a+R2b) is larger than the thickness of the plug 36.
    Type: Application
    Filed: April 24, 2013
    Publication date: October 31, 2013
    Inventors: Takashi KATAIGI, Takashi TANIMURA