Abstract: A standard member for automatically, stably, and highly accurately performing magnification calibration used in an electron microscope, the standard member including, on the same plane, a multilayer film cross section formed by alternately laminating materials different from each other, a plurality of first mark patterns arranged across a first silicon layer and in parallel to the multilayer film cross section, at least a pair of second mark patterns arranged across a second silicon layer thicker than the first silicon layer on the opposite side of the first mark patterns with respect to the multilayer film cross section and in parallel to the multilayer film cross section, and a silicon layer arranged on the outer side of the first mark patterns and the second mark patterns with respect to the multilayer film cross section.

Abstract: A standard member for automatically, stably, and highly accurately performing magnification calibration used in an electron microscope, the standard member including, on the same plane, a multilayer film cross section formed by alternately laminating materials different from each other, a plurality of first mark patterns arranged across a first silicon layer and in parallel to the multilayer film cross section, at least a pair of second mark patterns arranged across a second silicon layer thicker than the first silicon layer on the opposite side of the first mark patterns with respect to the multilayer film cross section and in parallel to the multilayer film cross section, and a silicon layer arranged on the outer side of the first mark patterns and the second mark patterns with respect to the multilayer film cross section.

Abstract: This invention provides a standard member allowing magnification calibration for use in an electron microscope to be performed with high precision. A (110) or (100) oriented silicon substrate including a magnification calibration pattern comprised of a constant pitch periodic pattern and a (110) or (100) oriented silicon substrate not including the constant pitch periodic pattern are bonded together by means of bonding without using an adhesive agent, while aligning the plane directions of the surfaces of the two substrates in the same orientation. Then, the thus bonded substrates are cleaved or diced so that their (111) surfaces or (110) surfaces become cross-section surfaces. Further, by selectively etching one side of the constant pitch periodic pattern, a standard member with no level difference and no damage to superlattice patterns and having a constant pitch concavity and convexity periodic pattern in a cross-section surface vertical to the substrate surface is created.

Abstract: This invention provides a standard member allowing magnification calibration for use in an electron microscope to be performed with high precision. A (110) or (100) oriented silicon substrate including a magnification calibration pattern comprised of a constant pitch periodic pattern and a (110) or (100) oriented silicon substrate not including the constant pitch periodic pattern are bonded together by means of bonding without using an adhesive agent, while aligning the plane directions of the surfaces of the two substrates in the same orientation. Then, the thus bonded substrates are cleaved or diced so that their (111) surfaces or (110) surfaces become cross-section surfaces. Further, by selectively etching one side of the constant pitch periodic pattern, a standard member with no level difference and no damage to superlattice patterns and having a constant pitch concavity and convexity periodic pattern in a cross-section surface vertical to the substrate surface is created.

Abstract: In a semiconductor integrated circuit device equipped with a flash memory and an EEPROM which are nonvolatile memories, the invention provides a technique that makes it possible to restrict an EEPROM capacity to a minimum necessary amount and reduce a chip area. Data of a minimal size required for one application program and rewritten frequently is stored in the EEPROM, and the EEPROM is configured to have a capacity of about that minimal size. Data of the same size that are respectively handled by other applications and rewritten frequently are stored in the flash memory. With respect to an application that is actually used, its data stored in the flash memory is transferred to the EEPROM and used. Data transfer between the flash memory and the EEPROM is performed if necessary. Consequently, the EEPROM capacity can be reduced and chip area reduction can be achieved.

Abstract: A semiconductor device and manufacturing method are provided in which chippings are reduced even if they occur during dicing. At least edge portions of a chip and another surface are chamfered to have a slant surface having a chamfering slant angle ?, respectively, where 90°<?<180°. Preferably, the chamfering slant angle ? is 100° to 135° or, alternatively, all of the chamfering slant angles of four sides of the chip are about 135°.

Abstract: In a semiconductor integrated circuit device equipped with a flash memory and an EEPROM which are nonvolatile memories, the invention provides a technique that makes it possible to restrict an EEPROM capacity to a minimum necessary amount and reduce a chip area. Data of a minimal size required for one application program and rewritten frequently is stored in the EEPROM, and the EEPROM is configured to have a capacity of about that minimal size. Data of the same size that are respectively handled by other applications and rewritten frequently are stored in the flash memory. With respect to an application that is actually used, its data stored in the flash memory is transferred to the EEPROM and used. Data transfer between the flash memory and the EEPROM is performed if necessary. Consequently, the EEPROM capacity can be reduced and chip area reduction can be achieved.

Abstract: A thin-film semiconductor device comprising at least a semiconductor element and a wiring is disclosed. A thin film of a protective insulating material is formed on the lower surface of the semiconductor element, and a substrate is bonded on the lower surface of the thin film. A method for fabricating the thin-film semi-conductor device is also disclosed, in which a thin-film semiconductor circuit is formed on a silicon-on-insulator wafer, the silicon substrate on the reverse side of the silicon-on-insulator wafer is etched off, a thin-film semiconductor chip is formed and attached to the of substrate, and the thin-film semiconductor chip and the substrate are wired to each other by printing.

Abstract: A thin-film semiconductor device comprising at least a semiconductor element and a wiring is disclosed. A thin film of a protective insulating material is formed on the lower surface of the semiconductor element, and a substrate is bonded on the lower surface of the thin film. A method for fabricating the thin-film semiconductor device is also disclosed, in which a thin-film semiconductor circuit is formed on a silicon-on-insulator wafer, the silicon substrate on the reverse side of the silicon-on-insulator wafer is etched off, a thin-film semiconductor chip is formed and attached to the substrate, and the thin-film semiconductor chip and the substrate are wired to each other by printing.

Abstract: A thin-film semiconductor device comprising at least a semiconductor element and a wiring is disclosed. A thin film of a protective insulating material is formed on the lower surface of the semiconductor element, and a substrate is bonded on the lower surface of the thin film. A method for fabricating the thin-film semiconductor device is also disclosed, in which a thin-film semiconductor circuit is formed on a silicon-on-insulator wafer, the silicon substrate on the reverse side of the silicon-on-insulator wafer is etched off, a thin-film semiconductor chip is formed and attached to the substrate, and the thin-film semi conductor chip and the substrate are wired to each other by printing.

Abstract: A thin-film semiconductor device comprising at least a semiconductor element and a wiring is disclosed. A thin film of a protective insulating material is formed on the lower surface of the semiconductor element, and a substrate is bonded on the lower surface of the thin film. A method for fabricating the thin-film semiconductor device is also disclosed, in which a thin-film semiconductor circuit is formed on a silicon-on-insulator wafer, the silicon substrate on the reverse side of the silicon-on-insulator wafer is etched off, a thin-film semiconductor chip is formed and attached to the substrate, and the thin-film semiconductor chip and the substrate are wired to each other by printing.

Abstract: A thin-film semiconductor device comprising at least a semiconductor element and a wiring is disclosed. A thin film of a protective insulating material is formed on the lower surface of the semiconductor element, and a substrate is bonded on the lower surface of the thin film. A method for fabricating the thin-film semiconductor device is also disclosed, in which a thin-film semiconductor circuit is formed on a silicon-on-insulator wafer, the silicon substrate on the reverse side of the silicon-on-insulator wafer is etched off, a thin-film semiconductor chip is formed and attached to the substrate, and the thin-film semiconductor chip and the substrate are wired to each other by printing.