Abstract: A semiconductor device includes a semiconductor substrate in which an effective region through which a current flows and a termination region formed so as to surround an outer peripheral side of the effective region are defined, an oxide film provided in contact with an upper surface of the termination region so as to cover the upper surface, an organic insulating film containing an insulating material and provided so as to cover a portion of the oxide film excluding the peripheral portion, and at least one of a groove concave downward and a ridge protruding upward in the portion of the oxide film covered with the organic insulating film, in which the groove has a portion in which a width thereof decreases upward, and the ridge has a portion in which the width thereof increases upward.

Abstract: A second semiconductor switching element is connected in series with a first semiconductor switching element, and is at least partially stacked on the first semiconductor switching element in the thickness direction. A first control element controls the first semiconductor switching element and the second semiconductor switching element, and performs an overcurrent protection operation with reference to a shunt voltage. The first control element is arranged outside the first semiconductor switching element and the second semiconductor switching element in the in-plane direction.

Abstract: A second semiconductor switching element is connected in series with a first semiconductor switching element, and is at least partially stacked on the first semiconductor switching element in the thickness direction. A first control element controls the first semiconductor switching element and the second semiconductor switching element, and performs an overcurrent protection operation with reference to a shunt voltage. The first control element is arranged outside the first semiconductor switching element and the second semiconductor switching element in the in-plane direction.

Abstract: A semiconductor device includes: parasitic inductances connected to respective power transistors; and a drive circuit connected to connection points at which the power transistors are connected to the respective parasitic inductances, and driving the power transistors. The drive circuit insulates reference potentials of the power transistors at the connection points from each other.