Patents by Inventor Takashi Tsukamoto

Takashi Tsukamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5991545
    Abstract: Herein disclosed is a microcomputer MCU adopting the general purpose register method. The microcomputer is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed to instruction execution means. And, the control of the coded division is executed by noting the code bits.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 23, 1999
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp., Hitachi Microcomputer System Ltd.
    Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
  • Patent number: 5969976
    Abstract: A division method and circuit performs a division for signed data by adding or subtracting a divisor to or from the dividend or the partial remainder from the division, according to the sign of the divisor or the dividend and the partial remainder to acquire a new partial remainder. The division is repeated a predetermined number of times in which a quotient bit is acquired according to the sign of the acquired partial remainder or the divisor. The dividend is corrected by subtracting 1, which is the significance of an LSB of the corresponding dividend, from the dividend when the sign of the dividend is negative, and the corrected dividend is used for the division processing.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: October 19, 1999
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp., Hitachi Microcomputer System Ltd.
    Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
  • Patent number: 5902406
    Abstract: A low pressure CVD system comprising an inner tube having an upper end and a lower end opened, and made of a silicon carbide material, an outer tube including a circumferential wall surrounding an outer periphery of the inner tube with a predetermined spacing, an upper wall closing an upper end of the circumferential wall and a flange provided at a lower portion thereof, the outer tube having a lower end opened, a base portion for supporting the inner tube and the outer tube at the lower ends thereof, and for providing hermetic sealing between the lower end of the outer tube and the base portion, the base portion having a central portion formed with an opening, a lid provided for opening and shutting the opening in the base portion, and a furnace wall surrounding the circumferential wall and the upper wall of the outer tube, the furnace wall having a heater arranged on an inner side thereof wherein the outer tube is made of a silicon carbide material, and padding of a silicon carbide material is formed at a c
    Type: Grant
    Filed: March 14, 1997
    Date of Patent: May 11, 1999
    Assignee: Asahi Glass Company Ltd.
    Inventors: Taroh Uchiyama, Yukio Yoshikawa, Takashi Tsukamoto, Jiro Nishihama
  • Patent number: 5682545
    Abstract: Herein disclosed is a microcomputer MCU adopting the general purpose register method. The microcomputer is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed to instruction execution means. And, the control of the coded division is executed by noting the code bits.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 28, 1997
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp., Hitachi Microcomputer System Ltd.
    Inventors: Shumpei Kawasaki, Eiji Sakakibara, Kaoru Fukada, Takanaga Yamazaki, Yasushi Akao, Shiro Baba, Toshimasa Kihara, Keiichi Kurakazu, Takashi Tsukamoto, Shigeki Masumura, Yasuhiro Tawara, Yugo Kashiwagi, Shuya Fujita, Katsuhiko Ishida, Noriko Sawa, Yoichi Asano, Hideaki Chaki, Tadahiko Sugawara, Masahiro Kainaga, Kouki Noguchi, Mitsuru Watabe
  • Patent number: 5497482
    Abstract: An external sync signal generated by a clock generation circuit inside a single-chip microcomputer is supplied to an external terminal of this chip. The external sync signal is necessary in an external expansion mode but not in a single-chip mode. Therefore, the external sync signal is supplied to the external terminal through a control gate while a suitable control signal is inputted to a control terminal of the control gate. According to this circuit construction, control can be made in such a manner that the external sync signal is not supplied to the output terminal in the single-chip mode. As a result, it becomes possible to prevent noise from entering a signal supplied to an adjacent pin through a coupling capacity between the external terminals in the single-chip mode, and to reduce consumed power of an output buffer circuit which is disposed between the control gate and the external terminals.
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: March 5, 1996
    Assignees: Hitachi, Ltd., Hitachi Micro Computer Engineering, Ltd.
    Inventors: Haruo Keida, Takashi Tsukamoto, Nobutaka Nagasaki
  • Patent number: 5493686
    Abstract: An external sync signal generated by a clock generation circuit inside a single-chip microcomputer is supplied to an external terminal of this chip. The external sync signal is necessary in an external expansion mode but not in a single-chip mode. Therefore, the external sync signal is supplied to the external terminal through a control gate while a suitable control signal is inputted to a control terminal of the control gate. According to this circuit construction, control can be made in such a manner that the external sync signal is not supplied to the output terminal in the single-chip mode. As a result, it becomes possible to prevent noise from entering a signal supplied to an adjacent pin through a coupling capacity between the external terminals in the single-chip mode, and to reduce consumed power of an output buffer circuit which is disposed between the control gate and the external terminals.
    Type: Grant
    Filed: May 3, 1995
    Date of Patent: February 20, 1996
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Haruo Keida, Takashi Tsukamoto, Nobutaka Nagasaki
  • Patent number: 5493656
    Abstract: A microcomputer includes one or more registers therein. These registers are provided for defining a specific address area. When a processor unit in the microcomputer accesses an address in the specific address area, it acknowledges the access to change the bus width and/or bus cycle of the microcomputer dynamically.
    Type: Grant
    Filed: May 2, 1995
    Date of Patent: February 20, 1996
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventor: Takashi Tsukamoto
  • Patent number: 5458699
    Abstract: A steel wire for making a high strength steel wire product which contains 0.6-1.1% C, 0.2-0.6% Si, 0.3-0.8% Mn, and impurities of max 0.010% P, max 0.010% S, max 0.003% O(oxygen), and max 0.002% N, and has a structure in which the maximum pearlite block size is 4.0 .mu.m, the maximum separation distance in pearlite lamellars is 0.1 .mu.m, and the maximum content of free ferrite is 1% by volume.The steel wire can be manufactured in the process as follows;1 heating a steel wire rod having above-mentioned chemical composition to the austenite range above Ac.sub.3 point or A.sub.cm point,2 initiating plastic deformation to not less than 20% total reduction in cross-sectional area in the temperature range 850.degree. C. -750.degree. C.,3 finishing plastic deformation in the range below Ae.sub.1 point and above 650.degree. C., and4 continuously cooling to a range lower than 650.degree. C. and higher than 550.degree. C., and thus transforming into pearlite phase.
    Type: Grant
    Filed: May 10, 1994
    Date of Patent: October 17, 1995
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Takashi Tsukamoto, Terutaka Tsumura, Masatake Tomita, Michitaka Fujita, Motoo Asakawa
  • Patent number: 5350463
    Abstract: A magnetically graduated steel bar is provided with a magnetic scale that has a steel composition consisting, on a weight basis, of 0.02-0.10% C, 0.50-1.0% Mn, 0.50-1.0% Si, 17-20% Cr, 5-8% Ni, 0.05-0.20% C plus N, and a balance of Fe and incidental impurities. The steel contains 30-60 vol % of a cold working induced martensite and is given a nonmagnetic austenitic structure by local melting. The steel bar has a tensile strength of at least 130 kgf/mm.sup.2 and a fatigue strength of at least 60 kgf/mm.sup.2.
    Type: Grant
    Filed: August 10, 1992
    Date of Patent: September 27, 1994
    Assignees: Sumitomo Metal Industries, Ltd., Kayaba Industry Co., Ltd.
    Inventors: Takashi Tsukamoto, Masakazu Nakazato
  • Patent number: 5341481
    Abstract: A microcomputer includes one or more registers therein. These registers are provided for defining a specific address area. When a processor unit in the microcomputer accesses an address in the specific address area, it acknowledges the access to change the bus width and/or bus cycle of the microcomputer dynamically.
    Type: Grant
    Filed: April 28, 1993
    Date of Patent: August 23, 1994
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventor: Takashi Tsukamoto
  • Patent number: 5179694
    Abstract: An external sync signal generated by a clock generation circuit inside a single-chip microcomputer is supplied to an external terminal of this chip. The external sync signal is necessary in an external expansion mode but not in a single-chip mode. Therefore, the external sync signal is supplied to the external terminal through a control gate while a suitable control signal is inputted to a control terminal of the control gate. According to this circuit construction, control can be made in such a manner that the external sync signal is not supplied to the output terminal in the single-chip mode. As a result, it becomes possible to prevent noise from entering a signal supplied to an adjacent pin through a coupling capacity between the external terminals in the single-chip mode, and to reduce consumed power of an output buffer circuit which is disposed between the control gate and the external terminals.
    Type: Grant
    Filed: September 4, 1990
    Date of Patent: January 12, 1993
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering, Ltd.
    Inventors: Haruo Keida, Takashi Tsukamoto, Nobutaka Nagasaki
  • Patent number: 5156692
    Abstract: A wire of a high-carbon steel having a carbon content of 0.7%-0.9% by weight is heat-treated so as to form supercooled austenitic phases, then subjected to plastic deformation with a reduction rate of at least 20% in the temperature range of below the Ae.sub.1 point and above 500.degree. C., and transformed into pearlite without heating to the austenitic range.The resulting pearlite has a pearlite block size of not greater than 5.0 .mu.m. Steel filaments which have a tensile strength of at least 400 kgf/mm.sup.2 and a reduction of area of at least 40% and which are suitable for use as tire cords in automobile tires can be obtained by wire drawing of the steel wire.
    Type: Grant
    Filed: October 9, 1991
    Date of Patent: October 20, 1992
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventor: Takashi Tsukamoto
  • Patent number: 5117488
    Abstract: In a microprocessor, a minimum instruction code length is set to a predetermined number of bits (e.g. one byte) length. One feature of the invention is that an instruction set which can selectively expand the instruction code length at a unit of the predetermined number of bits is used. Another feature is that an operand addressing mode and a type of operation for an operand are designated by separate predetermined number of code bits which are coded in a common coding scheme so that an instruction decoder is shared by those codes.
    Type: Grant
    Filed: November 1, 1988
    Date of Patent: May 26, 1992
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd., VLSI Engineering Corporation
    Inventors: Kouki Noguchi, Fumio Tsuchiya, Takashi Tsukamoto, Shigeki Masumura, Hideo Nakamura, Shiro Baba, Yoshimune Hagiwara
  • Patent number: 5080727
    Abstract: A method for producing a metallic material having an ultra-fine microstructure, the metallic material exhibiting a phase transformation of a low-temperature phase into a high-temperature phase is disclosed, the method comprising the steps of:preparing a metallic material which comprises at least a low-temperature phase;applying plastic deformation to the metallic material; andincreasing the temperature of the metallic material to a point beyond a transformation point while applying the plastic deformation to effect reverse transformation of the low-temperature phase into a high-temperature phase.
    Type: Grant
    Filed: December 5, 1989
    Date of Patent: January 14, 1992
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Kenji Aihara, Chihiro Hayashi, Takashi Tsukamoto, Nobuhiro Murai, Hyoji Hagita
  • Patent number: 5018817
    Abstract: A method of optically coupling one end of an optical fiber to a waveguide formed on a substrate, such that an end portion of the fiber is fitted in a groove formed in the substrate. The groove is formed by forming a beam-shielding mask having a cutout, on the substrate such that the cutout is aligned with a part of the substrate in which the groove is formed, and by irradiating the above-indicated part of the substrate with a high-energy beam. Alternatively, the groove is formed by a cutting tool. An inclined end surface of the groove left uncut by the tool may be irradiated with a high-energy beam, through a beam-shielding mask which has a cutout aligned with the inclined end surface. The end of the optical fiber, which has a flat face or has a coned or hemi-spherical shape, is positioned for optical coupling with a portion of the waveguide which is exposed to the groove.
    Type: Grant
    Filed: December 7, 1989
    Date of Patent: May 28, 1991
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Makoto Suzuki, Satoshi Watanabe, Takashi Tsukamoto, Hikoharu Aoki, Hitomi Ohri, Yukihiro Sako
  • Patent number: 4967352
    Abstract: An external sync signal generated by a clock generation circuit inside a single-chip microcomputer is supplied to an external terminal of this chip. The external sync signal is necessary in an external expansion mode but not in a single-chip mode. Therefore, the external sync signal is supplied to the external terminal through a control gate while a suitable control signal is inputted to a control terminal of the control gate. According to this circuit construction, control can be made in such a manner that the external sync signal is not supplied to the output terminal in the single-chip mode. As a result, it becomes possible to prevent noise from entering a signal supplied to an adjacent pin through a coupling capacity between the external terminals in the single-chip mode, and to reduce consumed power of an output buffer circuit which is disposed between the control gate and the external terminals.
    Type: Grant
    Filed: August 9, 1988
    Date of Patent: October 30, 1990
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Haruo Keida, Takashi Tsukamoto, Nobutaka Nagasaki
  • Patent number: 4841008
    Abstract: A chipping resistant polyurethane coating composition which comprises:(a) a polyisocyanate blocked with an oxime or a lactam or a polyurethane prepolymer having terminal isocyanate groups blocked with an oxime or a lactam;(b) a polyaminepolyetherpolyester which is a condensate of a polyaminepolyether and an organic carboxylic acid, the polyaminepolyether being an adduct of an oxirane compound to a polyamine compound, a polyamidepolyamineopolyether which is an adduct of an oxirane compound to a polyamidepolyamine, the polyamidepolyamine being a condensate of a polyamine and an organic carboxylic acid; or a mixture of the polyaminepoly-etherpolyester and the polyamidepolyaminepolyether.The composition in which an aromatic polyisocyanate or its prepolymer blocked with an oxime is curable at temperatures of about 90.degree.-100.degree. C.
    Type: Grant
    Filed: August 4, 1988
    Date of Patent: June 20, 1989
    Assignee: Takeda Chemical Industries, Ltd.
    Inventors: Takashi Tsukamoto, Toyoji Hatta, Ichiro Minato
  • Patent number: 4525598
    Abstract: A galvanized high strength steel wire for use in stranded steel core of an aluminum conductor, steel reinforced is disclosed. The steel composition thereof consists, by weight, essentially of:C: 0.4-1.2%,Si: not more than 2.0%,Mn: not more than 2.0%,Al: not more than 0.1%,Cr: 0-5.0%,Cu: 0-1.0%,Ni: 0-1.0%,V: 0-0.5%,Nb: 0-0.2%,Ti: 0-0.2%,Zr: 0-0.2%,with the balance iron with incidental impurities of which the amounts of P, S, N and oxygen are:P: not more than 0.025%,S: not more than 0.015%,P+S: not more than 0.03%,N: not more than 0.010%,Oxygen: not more than 0.004%.
    Type: Grant
    Filed: October 20, 1982
    Date of Patent: June 25, 1985
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Takashi Tsukamoto, Chuzo Sudo, Kenji Aihara, Syozi Nishimura