Patents by Inventor Takashi Watadani

Takashi Watadani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6838371
    Abstract: At the time of performing a polishing process on a tungsten film and a silicon oxide film, based on the relation between a residual step and pattern density preliminarily obtained while changing polishing parameters, from pattern density of plugs in the polishing step and a predetermined residual step required, polishing parameters are determined so that a residual step does not exceed a predetermined residual step “h”. With the determined polishing parameters, the polishing process is performed on the tungsten film and the silicon oxide film so that the films are planarized, and plugs are formed in contact holes. As a result, a semiconductor device in which a step does not exceeds a predetermined residual step by a polishing process is obtained.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: January 4, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Takashi Watadani, Hiroshi Oshita
  • Patent number: 6822334
    Abstract: A hard mask material 2 such as a silicon oxide film is formed on an aluminum alloy film 3. The hard mask material 2 is patterned in the form of a thick film wiring 6, followed by etching the aluminum alloy film 3 to a given depth through the mask. A resist 5 applied to the thin film portion of the aluminum alloy film 3 is patterned in the form of a thin film wiring 7. Etching through the resist 5 and the hard mask material 2 as a mask is effected to form the thick film wiring 6 and the thin film wiring 7 in the same layer.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: November 23, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Katsunobu Hori, Nobuo Fujiwara, Takashi Watadani, Makoto Nagano
  • Publication number: 20040192035
    Abstract: At the time of performing a polishing process on a tungsten film and a silicon oxide film, based on the relation between a residual step and pattern density preliminarily obtained while changing polishing parameters, from pattern density of plugs in the polishing step and a predetermined residual step required, polishing parameters are determined so that a residual step does not exceed a predetermined residual step “h”. With the determined polishing parameters, the polishing process is performed on the tungsten film and the silicon oxide film so that the films are planarized, and plugs are formed in contact holes. As a result, a semiconductor device in which a step does not exceeds a predetermined residual step by a polishing process is obtained.
    Type: Application
    Filed: September 4, 2003
    Publication date: September 30, 2004
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Takashi Watadani, Hiroshi Oshita
  • Publication number: 20020014695
    Abstract: A hard mask material 2 such as a silicon oxide film is formed on an aluminum alloy film 3. The hard mask material 2 is patterned in the form of a thick film wiring 6, followed by etching the aluminum alloy film 3 to a given depth through the mask. A resist 5 applied to the thin film portion of the aluminum alloy film 3 is patterned in the form of a thin film wiring 7. Etching through the resist 5 and the hard mask material 2 as a mask is effected to form the thick film wiring 6 and the thin film wiring 7 in the same layer.
    Type: Application
    Filed: January 10, 2001
    Publication date: February 7, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsunobu Hori, Nobuo Fujiwara, Takashi Watadani, Makoto Nagano