Abstract: Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The integrated devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The arrays and methods of the invention make use of silicon chip fabrication and manufacturing techniques developed for the electronics industry and highly suited for miniaturization and high throughput.

Abstract: Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The integrated devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The arrays and methods of the invention make use of silicon chip fabrication and manufacturing techniques developed for the electronics industry and highly suited for miniaturization and high throughput.

Abstract: Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The integrated devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The arrays and methods of the invention make use of silicon chip fabrication and manufacturing techniques developed for the electronics industry and highly suited for miniaturization and high throughput.

Abstract: Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The integrated devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The arrays and methods of the invention make use of silicon chip fabrication and manufacturing techniques developed for the electronics industry and highly suited for miniaturization and high throughput.

Abstract: Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The integrated devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The arrays and methods of the invention make use of silicon chip fabrication and manufacturing techniques developed for the electronics industry and highly suited for miniaturization and high throughput.

Abstract: Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The integrated devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The arrays and methods of the invention make use of silicon chip fabrication and manufacturing techniques developed for the electronics industry and highly suited for miniaturization and high throughput.

Abstract: Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The integrated devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The arrays and methods of the invention make use of silicon chip fabrication and manufacturing techniques developed for the electronics industry and highly suited for miniaturization and high throughput.

Abstract: Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The integrated devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The arrays and methods of the invention make use of silicon chip fabrication and manufacturing techniques developed for the electronics industry and highly suited for miniaturization and high throughput.

Abstract: Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The integrated devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The arrays and methods of the invention make use of silicon chip fabrication and manufacturing techniques developed for the electronics industry and highly suited for miniaturization and high throughput.

Abstract: Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The integrated devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The arrays and methods of the invention make use of silicon chip fabrication and manufacturing techniques developed for the electronics industry and highly suited for miniaturization and high throughput.

Abstract: Floating gates of a floating gate memory array have an inverted-T shape in both the bit line direction and the word line direction. Floating gates are formed using an etch stop layer that separates two polysilicon layers that form floating gates. Word lines extend over floating gates in one example, and word lines extend between floating gates in another example.

Abstract: Non-voltage storage and techniques for fabricating non-volatile storage are disclosed. In some embodiments, at least a portion of the control gates of non-volatile storage elements are formed from p-type polysilicon. In one embodiment, a lower portion of the control gate is p-type polysilicon. The upper portion of the control gate could be p-type polysilicon, n-type polysilicon, metal, metal nitride, etc. P-type polysilicon in the control gate may not deplete even at high Vpgm. Therefore, a number of problems that could occur if the control gate depleted are mitigated. For example, a memory cell having a control gate that is at least partially p-type polysilicon might be programmed with a lower Vpgm than a memory cell formed from n-type polysilicon.

Abstract: Non-voltage storage and techniques for fabricating non-volatile storage are disclosed. In some embodiments, at least a portion of the control gates of non-volatile storage elements are formed from p-type polysilicon. In one embodiment, a lower portion of the control gate is p-type polysilicon. The upper portion of the control gate could be p-type polysilicon, n-type polysilicon, metal, metal nitride, etc. P-type polysilicon in the control gate may not deplete even at high Vpgm. Therefore, a number of problems that could occur if the control gate depleted are mitigated. For example, a memory cell having a control gate that is at least partially p-type polysilicon might be programmed with a lower Vpgm than a memory cell formed from n-type polysilicon.

Abstract: Non-voltage storage and techniques for fabricating non-volatile storage are disclosed. In some embodiments, at least a portion of the control gates of non-volatile storage elements are formed from p-type polysilicon. In one embodiment, a lower portion of the control gate is p-type polysilicon. The upper portion of the control gate could be p-type polysilicon, n-type polysilicon, metal, metal nitride, etc. P-type polysilicon in the control gate may not deplete even at high Vpgm. Therefore, a number of problems that could occur if the control gate depleted are mitigated. For example, a memory cell having a control gate that is at least partially p-type polysilicon might be programmed with a lower Vpgm than a memory cell formed from n-type polysilicon.

Abstract: Methods for fabricating control gates in non-volatile storage are disclosed. When forming stacks for floating gate memory cells and transistor control gates, a sacrificial material may be formed at the top of the stacks. After insulation is formed between the stacks, the sacrificial material may be removed to reveal openings. In some embodiments, cutouts are then formed in regions in which control gates of transistors are to be formed. Metal is then formed in the openings, which may include the cutout regions. Therefore, floating gate memory cells having at least partially metal control gates and transistors having at least partially metal control gates may be formed in the same process. A barrier layer may be formed prior to depositing the metal in order to prevent silicidation of polysilicon in the control gates.

Abstract: Methods for fabricating control gates in non-volatile storage are disclosed. When forming stacks for floating gate memory cells and transistor control gates, a sacrificial material may be formed at the top of the stacks. After insulation is formed between the stacks, the sacrificial material may be removed to reveal openings. In some embodiments, cutouts are then formed in regions in which control gates of transistors are to be formed. Metal is then formed in the openings, which may include the cutout regions. Therefore, floating gate memory cells having at least partially metal control gates and transistors having at least partially metal control gates may be formed in the same process. A barrier layer may be formed prior to depositing the metal in order to prevent silicidation of polysilicon in the control gates.

Abstract: Methods for fabricating control gates in non-volatile storage are disclosed. When forming stacks for floating gate memory cells and transistor control gates, a sacrificial material may be formed at the top of the stacks. After insulation is formed between the stacks, the sacrificial material may be removed to reveal openings. In some embodiments, cutouts are then formed in regions in which control gates of transistors are to be formed. Metal is then formed in the openings, which may include the cutout regions. Therefore, floating gate memory cells having at least partially metal control gates and transistors having at least partially metal control gates may be formed in the same process. A barrier layer may be formed prior to depositing the metal in order to prevent silicidation of polysilicon in the control gates.

Abstract: Methods for fabricating control gates in non-volatile storage are disclosed. When forming stacks for floating gate memory cells and transistor control gates, a sacrificial material may be formed at the top of the stacks. After insulation is formed between the stacks, the sacrificial material may be removed to reveal openings. In some embodiments, cutouts are then formed in regions in which control gates of transistors are to be formed. Metal is then formed in the openings, which may include the cutout regions. Therefore, floating gate memory cells having at least partially metal control gates and transistors having at least partially metal control gates may be formed in the same process. A barrier layer may be formed prior to depositing the metal in order to prevent silicidation of polysilicon in the control gates.

Abstract: Non-voltage storage and techniques for fabricating non-volatile storage are disclosed. In some embodiments, at least a portion of the control gates of non-volatile storage elements are formed from p-type polysilicon. In one embodiment, a lower portion of the control gate is p-type polysilicon. The upper portion of the control gate could be p-type polysilicon, n-type polysilicon, metal, metal nitride, etc. P-type polysilicon in the control gate may not deplete even at high Vpgm. Therefore, a number of problems that could occur if the control gate depleted are mitigated. For example, a memory cell having a control gate that is at least partially p-type polysilicon might be programmed with a lower Vpgm than a memory cell formed from n-type polysilicon.

Abstract: A memory system is disclosed that includes a set of non-volatile storage elements. A given memory cell has a dielectric cap above the floating gate. In one embodiment, the dielectric cap resides between the floating gate and a conformal IPD layer. The dielectric cap reduces the leakage current between the floating gate and a control gate. The dielectric cap achieves this reduction by reducing the strength of the electric field at the top of the floating gate, which is where the electric field would be strongest without the dielectric cap for a floating gate having a narrow stem.