Patents by Inventor Takashi Yanada

Takashi Yanada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190149734
    Abstract: An arithmetic processing device of a pipeline configuration in which a combination of a combination circuit and a flip-flop circuit group including a plurality of flip-flop circuits corresponding to each bits of output data of the combination circuit is connected in a plurality of stages includes a mask processing section configured to control a mask of an operation clock signal to be supplied to each flip-flop circuit, wherein the mask processing section is configured to supply the operation clock signal to each flip-flop circuit corresponding to a bit of the input data for use in the arithmetic process in the combination circuit, and wherein the mask processing section is configured to mask the operation clock signal corresponding to a bit of the input data that is unused in the arithmetic process in the combination circuit.
    Type: Application
    Filed: January 10, 2019
    Publication date: May 16, 2019
    Applicant: OLYMPUS CORPORATION
    Inventors: Takashi Yanada, Akira Ueno
  • Publication number: 20180084275
    Abstract: A calculation device of the present invention is a calculation device includes a standard block data storage unit that stores data of the standard block, a reference block data storage unit that stores data of the reference block, a plurality of correlation calculation units that simultaneously calculate correlation values at a plurality of different positions, and a sorting unit that sorts the plurality of correlation values calculated by the correlation calculation unit in a descending order of correlation, and holds a result of the sorting, and the calculation device compares correlation threshold values respectively input to the plurality of correlation calculation units with the plurality of correlation values calculated by the plurality of correlation calculation units, and performs a correlation calculation stop process of stopping an operation of the correlation calculation unit when the correlation value has a lower correlation than the correlation threshold value.
    Type: Application
    Filed: November 28, 2017
    Publication date: March 22, 2018
    Applicant: OLYMPUS CORPORATION
    Inventor: Takashi Yanada
  • Patent number: 9565378
    Abstract: An imaging device includes a solid-state imaging device configured to include a plurality of pixels, the solid-state imaging device outputting subject data according to a pixel signal output by the pixel of an image region on which subject light is incident and optical black (OB) data according to the pixel signal output by the pixel of a constantly shielded OB region of a plurality of columns or rows located on an end of the image region as image data, and an imaging processing unit configured to output pre-processed image data obtained by performing black level correction on partial subject data included in the image data using the same OB data included in the image data output by the solid-state imaging device.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: February 7, 2017
    Assignee: OLYMPUS CORPORATION
    Inventors: Ayahiko Takahashi, Yoshinobu Tanaka, Takashi Yanada, Akira Ueno
  • Patent number: 9554070
    Abstract: An imaging device includes a solid-state imaging device, a storage unit, an imaging-processing unit configured to process input image data output from the solid-state imaging device or image data stored in the storage unit, and a timing-generating unit configured to generate timings at which the solid-state imaging device and the imaging-processing unit operate. The timing-generating unit generates a first synchronization signal for driving the solid-state imaging device to output the first synchronization signal to the solid-state imaging device and output the first synchronization signal and a first clock signal input from the solid-state imaging device to the imaging-processing unit in a first operation based on the timing of the solid-state imaging device. The timing-generating unit outputs a generated second synchronization signal and second clock signal to the imaging-processing unit in a second operation based on an internal timing of the imaging-processing unit.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: January 24, 2017
    Assignee: Olympus Corporation
    Inventors: Takashi Yanada, Yoshinobu Tanaka, Ayahiko Takahashi, Akira Ueno
  • Patent number: 9483713
    Abstract: An image processing device includes: a common region sum of absolute differences (SAD) calculation unit configured to define each of a common target region in which a plurality of target regions predetermined for each target pixel overlap and a common reference region in which a plurality of reference regions predetermined for each corresponding reference pixel overlap and output a common SAD calculation result obtained by performing SAD calculation based on values represented by pixel signals of pixels included in the common target region and the common reference region; and addition processing units equal in number to the target pixels to be simultaneously correlated and configured to correspond to the target pixels and output SAD calculation results obtained by performing addition processes based on the common SAD calculation result and an SAD calculation result of a region which is not included in the common target region within a target region.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: November 1, 2016
    Assignee: Olympus Corporation
    Inventors: Ryusuke Tsuchida, Yoshinobu Tanaka, Takashi Yanada
  • Patent number: 9332212
    Abstract: The imaging apparatus include a solid-state imaging device which has a plurality of pixels and outputs a pixel signal corresponding to a formed image of a subject as an image data; an image-capturing processing unit which outputs a pre-processed image data that is obtained by performing pre-processing on a part of the image data input from the solid-state imaging device, and an un-processed image data except the part of the image data from the image data input from the solid-state imaging device; and a storage unit which stores the pre-processed image data and the un-processed image data.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: May 3, 2016
    Assignee: OLYMPUS CORPORATION
    Inventors: Yoshinobu Tanaka, Akira Ueno, Takashi Yanada, Ayahiko Takahashi
  • Patent number: 9286535
    Abstract: An image processing device includes an extended region sum of absolute differences (SAD) calculation unit configured to define each of an extended target region obtained by combining a plurality of predetermined target regions for each target pixel and an extended reference region obtained by combining a plurality of predetermined reference regions for each corresponding reference pixel and output an extended SAD calculation result obtained by performing SAD calculation based on values represented by pixel signals of pixels included in the extended target region and the extended reference region, and subtraction processing units equal in number to the target pixels to be simultaneously correlated and configured to correspond to the plurality of target pixels and output SAD calculation results obtained by performing subtraction processes based on the extended SAD calculation result and an SAD calculation result of a region which is not included in a target region.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: March 15, 2016
    Assignee: OLYMPUS CORPORATION
    Inventors: Ryusuke Tsuchida, Yoshinobu Tanaka, Takashi Yanada
  • Patent number: 9288397
    Abstract: For pixel signals of a plurality of pixels arranged in a first pixel area arranged in a two dimensional matrix form, a size of the first pixel area is converted to output first image data, and for pixel signals of pixels arranged in a second pixel area smaller than the first pixel area, a size of the second pixel area is converted to output second image data, wherein an operating mode is changed in response to the size of the second pixel area.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: March 15, 2016
    Assignee: OLYMPUS CORPORATION
    Inventors: Yoshinobu Tanaka, Takashi Yanada, Akira Ueno
  • Patent number: 9277145
    Abstract: An imaging device is provided which includes a solid-state imaging device that includes a plurality of pixels arranged in a form of a two-dimensional (2D) matrix, and outputs pixel signals corresponding to subject light incident on the plurality of pixels, and a plurality of image-acquiring units that acquire the pixel signals output from the solid-state imaging device, and output image data corresponding to the acquired pixel signals, wherein each of the plurality of image-acquiring units acquires pixel signals of one of divisional imaging regions obtained by dividing an imaging region in which all pixels arranged in the solid-state imaging device image the subject light by the number of image-acquiring units, and outputs image data corresponding to the acquired pixel signal of the divisional imaging region as divisional image data.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: March 1, 2016
    Assignee: OLYMPUS CORPORATION
    Inventors: Takashi Yanada, Yoshinobu Tanaka, Tomoyuki Sengoku, Masami Shimamura, Akira Ueno
  • Patent number: 9247168
    Abstract: An imaging device includes a solid-state imaging device including focus detecting pixels which are arranged together in a region in which imaging pixels are arranged in a form of a two-dimensional (2D) matrix, a separating unit configured to separate imaging signals and focus detection signals from pixel signals output from the solid-state imaging device, to output horizontal direction focus detection signals output from a horizontal direction focus detecting pixel set including two focus detecting signals in a row direction and vertical direction focus detection signals output from a vertical direction focus detecting pixel set including two focus detecting signals in a column direction, a horizontal direction focus detection processing unit configured to convert a format in which the horizontal direction focus detection signals are output to a predetermined format.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: January 26, 2016
    Assignee: OLYMPUS CORPORATION
    Inventors: Takashi Yanada, Yoshinobu Tanaka
  • Patent number: 9225908
    Abstract: An imaging apparatus includes a solid-state image sensor that has a plurality of pixels arranged in a two-dimensional matrix form and outputs pixel signals according to subject light incident on each of the plurality of pixels in at least two or more drive modes, a first processing unit that performs, on the pixel signals output by the solid-state image sensor according to any one drive mode, the equal process to a first process performed when the solid-state image sensor outputs the pixel signals according to another drive mode and a pixel signal selection unit that selects any one of the pixel signals that are subject to the equal process to the first process performed by the first processing unit or the pixel signals that are subject to the first process performed by the solid-state image sensor according to the latter drive mode.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: December 29, 2015
    Assignee: OLYMPUS CORPORATION
    Inventors: Yoshinobu Tanaka, Takashi Yanada, Akira Ueno
  • Patent number: 9137446
    Abstract: An imaging device, a method of capturing an image, and a program product used to capture a plurality of images, reduce the captured images, transfer second image data correspondent to each of the reduced images, display first images and identify a second image correspondent to the first image, which is instructed by a user.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: September 15, 2015
    Assignee: OLYMPUS CORPORATION
    Inventors: Yoshinobu Tanaka, Akira Ueno, Takashi Yanada
  • Publication number: 20150163432
    Abstract: An image processing device includes an extended region sum of absolute differences (SAD) calculation unit configured to define each of an extended target region obtained by combining a plurality of predetermined target regions for each target pixel and an extended reference region obtained by combining a plurality of predetermined reference regions for each corresponding reference pixel and output an extended SAD calculation result obtained by performing SAD calculation based on values represented by pixel signals of pixels included in the extended target region and the extended reference region, and subtraction processing units equal in number to the target pixels to be simultaneously correlated and configured to correspond to the plurality of target pixels and output SAD calculation results obtained by performing subtraction processes based on the extended SAD calculation result and an SAD calculation result of a region which is not included in a target region.
    Type: Application
    Filed: December 4, 2014
    Publication date: June 11, 2015
    Applicant: OLYMPUS CORPORATION
    Inventors: Ryusuke Tsuchida, Yoshinobu Tanaka, Takashi Yanada
  • Publication number: 20150161478
    Abstract: An image processing device includes: a common region sum of absolute differences (SAD) calculation unit configured to define each of a common target region in which a plurality of target regions predetermined for each target pixel overlap and a common reference region in which a plurality of reference regions predetermined for each corresponding reference pixel overlap and output a common SAD calculation result obtained by performing SAD calculation based on values represented by pixel signals of pixels included in the common target region and the common reference region; and addition processing units equal in number to the target pixels to be simultaneously correlated and configured to correspond to the target pixels and output SAD calculation results obtained by performing addition processes based on the common SAD calculation result and an SAD calculation result of a region which is not included in the common target region within a target region.
    Type: Application
    Filed: December 4, 2014
    Publication date: June 11, 2015
    Applicant: OLYMPUS CORPORATION
    Inventors: Ryusuke Tsuchida, Yoshinobu Tanaka, Takashi Yanada
  • Patent number: 9021162
    Abstract: A data processing apparatus may include a data conversion unit for, when converting a plurality of sequentially input data into conversion data of the same bit number as a data bus having a prescribed bit number and sequentially transferring the conversion data. The data conversion unit may include a first data generation unit, a second data generation unit for generating second data obtained by allocating a prescribed second number of input data in the input data not allocated to the first data, to the second bit range and a data coupling unit for coupling the first data and the second data to generate the conversion data having the bit number of the bus width of the data bus.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: April 28, 2015
    Assignee: Olympus Corporation
    Inventors: Ryusuke Tsuchida, Akira Ueno, Masami Shimamura, Yoshinobu Tanaka, Takashi Yanada, Tomoyuki Sengoku
  • Patent number: 9007479
    Abstract: An imaging apparatus and an evaluation value generation apparatus can include an image data interface unit that outputs image data according to a pixel signal input from a solid-state imaging device as first image data, an image data reading unit that reads image data stored in a storage unit and outputs the read image data as second image data, an evaluation value generation unit that generates an evaluation value based on input image data, an image data selection unit that selects one of image data based on the first image data and image data based on the second image data as image data to be input to the evaluation value generation unit, and an image data writing unit that stores the image data based on the first image data in the storage unit.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: April 14, 2015
    Assignee: Olympus Corporation
    Inventors: Yoshinobu Tanaka, Takashi Yanada, Tomoyuki Sengoku
  • Publication number: 20150070530
    Abstract: The imaging apparatus include a solid-state imaging device which has a plurality of pixels and outputs a pixel signal corresponding to a formed image of a subject as an image data; an image-capturing processing unit which outputs a pre-processed image data that is obtained by performing pre-processing on a part of the image data input from the solid-state imaging device, and an un-processed image data except the part of the image data from the image data input from the solid-state imaging device; and a storage unit which stores the pre-processed image data and the un-processed image data.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 12, 2015
    Applicant: OLYMPUS CORPORATION
    Inventors: Yoshinobu Tanaka, Akira Ueno, Takashi Yanada, Ayahiko Takahashi
  • Publication number: 20150070535
    Abstract: An imaging device includes a solid-state imaging device configured to include a plurality of pixels, the solid-state imaging device outputting subject data according to a pixel signal output by the pixel of an image region on which subject light is incident and optical black (OB) data according to the pixel signal output by the pixel of a constantly shielded OB region of a plurality of columns or rows located on an end of the image region as image data, and an imaging processing unit configured to output pre-processed image data obtained by performing black level correction on partial subject data included in the image data using the same OB data included in the image data output by the solid-state imaging device.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 12, 2015
    Applicant: OLYMPUS CORPORATION
    Inventors: Ayahiko Takahashi, Yoshinobu Tanaka, Takashi Yanada, Akira Ueno
  • Publication number: 20150070527
    Abstract: An imaging device includes a solid-state imaging device, a storage unit, an imaging-processing unit configured to process input image data output from the solid-state imaging device or image data stored in the storage unit, and a timing-generating unit configured to generate timings at which the solid-state imaging device and the imaging-processing unit operate. The timing-generating unit generates a first synchronization signal for driving the solid-state imaging device to output the first synchronization signal to the solid-state imaging device and output the first synchronization signal and a first clock signal input from the solid-state imaging device to the imaging-processing unit in a first operation based on the timing of the solid-state imaging device. The timing-generating unit outputs a generated second synchronization signal and second clock signal to the imaging-processing unit in a second operation based on an internal timing of the imaging-processing unit.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 12, 2015
    Applicant: OLYMPUS CORPORATION
    Inventors: Takashi Yanada, Yoshinobu Tanaka, Ayahiko Takahashi, Akira Ueno
  • Patent number: 8976281
    Abstract: An image pickup device may include an image capturing unit that includes a solid-state image pickup device having a plurality of pixels arrayed in a matrix form, the image capturing unit sequentially outputting a plurality of image capturing signals each of which corresponds to one of a plurality of pixel signals output from the solid-state image pickup device, and an evaluation value generating unit to which the plurality of image capturing signals output from the image capturing unit are sequentially input, the evaluation value generating unit generating an evaluation value based on the input image capturing signals. The evaluation value generating unit may include a horizontal decimation unit, a vertical decimation unit, a vertical evaluation value generating unit, and a horizontal evaluation value generating unit.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: March 10, 2015
    Assignee: Olympus Corporation
    Inventors: Yoshinobu Tanaka, Takashi Yanada