Patents by Inventor Takashi Yokoshima

Takashi Yokoshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7714367
    Abstract: A semiconductor device of which manufacturing steps can be simplified by doping impurities at a time, and a manufacturing method thereof.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: May 11, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Saishi Fujikawa, Etsuko Asano, Tatsuya Arao, Takashi Yokoshima, Takuya Matsuo, Hidehito Kitakado
  • Patent number: 7560315
    Abstract: It is an object of the present invention to enhance a selection ratio in an etching process, and provide a method for manufacturing a semiconductor device that has favorable uniform characteristics with high yield. In a method for manufacturing a semiconductor device according to the present invention, a first layer is formed over a substrate, second layer is formed on the first layer, the first layer and the second layer are etched to form a first pattern, and the second layer in the first pattern is selectively etched with plasma of boron trichloride, chlorine, and oxygen using ECR (Electron Cyclotron Resonance) or ICP (Inductively Coupled Plasma) to form a second pattern.
    Type: Grant
    Filed: May 23, 2006
    Date of Patent: July 14, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shigeharu Monoe, Takashi Yokoshima, Shinya Sasagawa
  • Patent number: 7554128
    Abstract: A light-emitting device, which has a structure that improves an opening ratio and light extraction efficiency, can solve a problem of an etching residue occurred during forming the device itself, and reduce deterioration due to poor coverage and short-circuiting to improve greatly the reliability, and a method for manufacturing the light-emitting device. In the light-emitting device having a structure that improves light extraction efficiency, a material used for forming a first electrode is Ti/TiN/Al (or Al—Ti)/Ti (or TiN).
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: June 30, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoru Okamoto, Shigeharu Monoe, Takashi Yokoshima
  • Patent number: 7485579
    Abstract: In performing an anisotropic etching process after a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, a portion that is not etched is left at an edge of a second conductive film to shorten an LDD region. It is an object to make the LDD region longer by reducing or removing the left portion that is not etched. After a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, an argon plasma treatment is performed. With this argon plasma treatment, a reactive organism in the taper etching process is removed, and it becomes possible to reduce or remove the left portion that is not etched in the anisotropic etching to be performed next.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: February 3, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Takashi Yokoshima, Shigeharu Monoe
  • Patent number: 7253044
    Abstract: With respect to the selective ratio in the etching process, it is an object to give design freedom in size of an LDD overlapped with a gate electrode, which is formed in a self-aligning manner, by performing an etching process under an etching condition that has a high selective ratio between a mask pattern and metal such as titanium in forming a first conductive layer pattern.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: August 7, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shigeharu Monoe, Takashi Yokoshima, Shinya Sasagawa
  • Publication number: 20070170513
    Abstract: A semiconductor device of which manufacturing steps can be simplified by doping impurities at a time, and a manufacturing method thereof.
    Type: Application
    Filed: March 30, 2007
    Publication date: July 26, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Saishi Fujikawa, Etsuko Asano, Tatsuya Arao, Takashi Yokoshima, Takuya Matsuo, Hidehito Kitakado
  • Patent number: 7202149
    Abstract: A semiconductor device of which manufacturing steps can be simplified by doping impurities at a time, and a manufacturing method thereof.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: April 10, 2007
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha Co., Ltd.
    Inventors: Saishi Fujikawa, Etsuko Asano, Tatsuya Arao, Takashi Yokoshima, Takuya Matsuo, Hidehito Kitakado
  • Patent number: 7172931
    Abstract: It is an object of the present invention to enhance a selection ratio in an etching process, and provide a method for manufacturing a semiconductor device that has favorable uniform characteristic with high yield. In a method for manufacturing a semiconductor device according to the present invention, a semiconductor layer is formed, a gate insulating film is formed on the semiconductor film, a first conductive layer is formed on the gate insulating film, a second conductive layer is formed on the first conductive layer, the first conductive layer and the second conductive layer are etched to form a first conductive-layer pattern, the second conductive layer in the first conductive-layer pattern is selectively etched with plasma of boron trichloride, chlorine, and oxygen to form a second conductive-layer pattern, and a first impurity region and a second impurity region are formed in the semiconductor layer.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: February 6, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shigeharu Monoe, Takashi Yokoshima, Shinya Sasagawa
  • Publication number: 20070015370
    Abstract: It is an object of the present invention to enhance a selection ratio in an etching process, and provide a method for manufacturing a semiconductor device that has favorable uniform characteristics with high yield. In a method for manufacturing a semiconductor device according to the present invention, a semiconductor layer is formed, a gate insulating film is formed on the semiconductor film, a first conductive layer is formed on the gate insulating film, a second conductive layer is formed on the first conductive layer, the first conductive: layer and the second conductive layer are etched to form a first conductive-layer pattern, the second conductive layer in the first conductive-layer pattern is selectively etched with plasma of boron trichloride, chlorine, and oxygen to form a second conductive-layer pattern, and a first impurity region and a second impurity region are formed in the semiconductor layer.
    Type: Application
    Filed: May 23, 2006
    Publication date: January 18, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shigeharu Monoe, Takashi Yokoshima, Shinya Sasagawa
  • Publication number: 20070015321
    Abstract: With respect to the selective ratio in the etching process, it is an object to give design freedom in size of an LDD overlapped with a gate electrode, which is formed in a self-aligning manner, by performing an etching process under an etching condition that has a high selective ratio between a mask pattern and metal such as titanium in forming a first conductive layer pattern.
    Type: Application
    Filed: September 22, 2006
    Publication date: January 18, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shigeharu Monoe, Takashi Yokoshima, Shinya Sasagawa
  • Patent number: 7163852
    Abstract: With respect to the selective ratio in the etching process, it is an object to give design freedom in size of an LDD overlapped with a gate electrode, which is formed in a self-aligning manner, by performing an etching process under an etching condition that has a high selective ratio between a mask pattern and metal such as titanium in forming a first conductive layer pattern.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: January 16, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shigeharu Monoe, Takashi Yokoshima, Shinya Sasagawa
  • Publication number: 20050247938
    Abstract: A light-emitting device, which has a structure that improves an opening ratio and light extraction efficiency, can solve a problem of an etching residue occurred during forming the device itself, and reduce deterioration due to poor coverage and short-circuiting to improve greatly the reliability, and a method for manufacturing the light-emitting device. In the light-emitting device having a structure that improves light extraction efficiency, a material used for forming a first electrode is Ti/TiN/Al (or Al—Ti)/Ti (or TiN).
    Type: Application
    Filed: June 28, 2005
    Publication date: November 10, 2005
    Inventors: Satoru Okamoto, Shigeharu Monoe, Takashi Yokoshima
  • Patent number: 6958490
    Abstract: A light-emitting device, which has a structure that improves an opening ratio and light extraction efficiency, can solve a problem of an etching residue occurred during forming the device itself, and reduce deterioration due to poor coverage and short-circuiting to improve greatly the reliability, and a method for manufacturing the light-emitting device. In the light-emitting device having a structure that improves light extraction efficiency, a material used for forming a first electrode is Ti/TiN/Al (or Al—Ti)/Ti (or TiN).
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: October 25, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoru Okamoto, Shigeharu Monoe, Takashi Yokoshima
  • Publication number: 20050181610
    Abstract: [Object] In performing an anisotropic etching process after a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, a portion that is not etched is left at an edge of a second conductive film to shorten an LDD region. It is an object to make the LDD region longer by reducing or removing the left portion that is not etched. [Solving Means] After a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, an argon plasma treatment is performed. With this argon plasma treatment, a reactive organism in the taper etching process is removed, and it becomes possible to reduce or remove the left portion that is not etched in the anisotropic etching to be performed next.
    Type: Application
    Filed: December 10, 2003
    Publication date: August 18, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Takashi Yokoshima, Shigeharu Monoe
  • Publication number: 20050133862
    Abstract: A semiconductor device of which manufacturing steps can be simplified by doping impurities at a time, and a manufacturing method thereof.
    Type: Application
    Filed: December 14, 2004
    Publication date: June 23, 2005
    Inventors: Saishi Fujikawa, Etsuko Asano, Tatsuya Arao, Takashi Yokoshima, Takuya Matsuo, Hidehito Kitakado
  • Publication number: 20040209409
    Abstract: With respect to the selective ratio in the etching process, it is an object to give design freedom in size of an LDD overlapped with a gate electrode, which is formed in a self-aligning manner, by performing an etching process under an etching condition that has a high selective ratio between a mask pattern and metal such as titanium in forming a first conductive layer pattern.
    Type: Application
    Filed: December 10, 2003
    Publication date: October 21, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shigeharu Monoe, Takashi Yokoshima, Shinya Sasagawa
  • Publication number: 20040171242
    Abstract: It is an object of the present invention to enhance a selection ratio in an etching process, and provide a method for manufacturing a semiconductor device that has favorable uniform characteristics with high yield.
    Type: Application
    Filed: February 13, 2004
    Publication date: September 2, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shigeharu Monoe, Takashi Yokoshima, Shinya Sasagawa
  • Publication number: 20040135151
    Abstract: A light-emitting device, which has a structure that improves an opening ratio and light extraction efficiency, can solve a problem of an etching residue occurred during forming the device itself, and reduce deterioration due to poor coverage and short-circuiting to improve greatly the reliability, and a method for manufacturing the light-emitting device. In the light-emitting device having a structure that improves light extraction efficiency, a material used for forming a first electrode is Ti/TiN/Al (or Al—Ti)/Ti (or TiN).
    Type: Application
    Filed: December 22, 2003
    Publication date: July 15, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoru Okamoto, Shigeharu Monoe, Takashi Yokoshima