Abstract: Virtual Functions (VFs) 602-1 to 602-N of an I/O device are separately allocated to a plurality of computers 1-1 to 1-N. In an address swap table 506, a root domain that is an address space of the computer 1 and mapping information of an I/O domain that is an address space unique to the I/O device 6 are registered. Mapping is set with the VFs 602-1 to 602-N as units. When accessing the VFs 602-1 to 602-N of the I/O device 6 to which each of the computers 1-1 to 1-N is allocated, an I/O packet transfer unit 701 checks the address swap table 506 to swap source/destination addresses recorded in packet headers.

Abstract: A network system of the present invention includes a computer and a device connected via a network, and a system management device. The computer and the device include, respectively, bridges that encapsulate transmission/reception data transmitted and received to and from each other and transmit and receive the data to and from each other via the network. Each of the bridges includes a control data transmitting means for generating control data for controlling the state of the system based on control auxiliary data issued from the computer or the device and used for controlling the state of the system, and transmitting the control data to the system management device via the network. The system management device includes a system controlling means for controlling the state of the system in accordance with the control data received thereby.

Abstract: An image recording apparatus includes an ink-jet head having a plurality of nozzles and configured to jet ink droplets from the nozzles; a carriage configured to carry the ink-jet head, and reciprocate in a predetermined scanning direction; a transport mechanism configured to transport the recording medium, on which the ink droplets jetted from the nozzles land, in a transport direction intersecting the scanning direction; and a control device configured to control the ink-jet head, the carriage and the transport mechanism to perform recording of the image. The nozzles include a plurality of first nozzles which are aligned at first interval with respect to the transport direction and from which first-type ink droplets are jetted, and a plurality of second nozzles which are aligned at second interval with respect to the transport direction and from which second-type ink droplets different from the first-type ink droplets are jetted.

Abstract: A trouble analysis apparatus is provided which includes: a system topology storing portion; an error detection information receiving portion which collects error detection information; and a trouble source determination portion which, based on both the error detection information collected by the error detection information receiving portion and system topology information stored in the system topology information storing portion, determines a trouble source functional element that is presumed as a functional element which is a source of a system trouble. Links included in the system topology information have information indicating spreading directions of error operations between the functional elements when trouble occurs. When the trouble source detection portion receives the error detection information with regard to multiple error functional elements, the trouble source determination portion sequentially selects one of the multiple error functional elements.

Abstract: A semiconductor device includes a first arithmetic engine which executes a first arithmetic process in every cycle and outputs first data representing the result of the first arithmetic process and a first valid signal representing a first or second value in every cycle, and a second arithmetic engine which executes a second arithmetic process in every cycle and outputs second data representing the result of the second arithmetic process and a second valid signal representing the first or second value in every cycle. The device also includes an inter-arithmetic-engine buffer which is used to exchange the first data and the second data between the first and second arithmetic engines, enables write of the first or second data if the first or second valid signal indicates the first value, and inhibits write of the first or second data if the first or second valid signal indicates the second value.

Abstract: Provided are a first PCI-PCI bridge that handles Multi Root to connect to a plurality of root complexes; a second PCI-PCI bridge that connects to an endpoint; a virtual PCI Express switch that performs a switching process between the first and second PCI-PCI bridges; and a network control device that transfers data that is to be processed in the virtual PCI Express switch to an external switch through a network without passing through a PCI-PCI bridge.

Abstract: A CPU 80 controls data transfer from a first device to a second device in a kernel mode. A main memory 90 stores data to be transferred from the first device to the second device. The CPU 80 has: a first device control means 81 which controls the first device; a second device control means which controls the second device; and a data transfer control means 83 which makes a read instruction which instructs the first device control means 81 to store data read from the first device in the main memory 3, and makes a write instruction which instructs the second device control means 82 to write the data stored in the main memory 3 in the second device.

Abstract: A switch (304) includes a plurality of bridges (3041, 3042, 3043, 3044, 3045) and a switch forwarding mechanism (20). Each of the bridges transmits and receives a TLP frame complying with PCI express to and from a device connected to each of the bridges. The switch forwarding mechanism includes a plurality of ports (1, 2, 3, 4, 5) to which the bridges are connected, respectively, selects an output port in dependence on a combination of destination information on the TLP frame input from one of the plurality of ports and the port which input the TLP frame, and outputs the TLP frame from the selected output port.

Abstract: An image recording apparatus includes an ink-jet head having a plurality of nozzles and configured to jet ink droplets from the nozzles; a carriage configured to carry the ink-jet head, and reciprocate in a predetermined scanning direction; a transport mechanism configured to transport the recording medium, on which the ink droplets jetted from the nozzles land, in a transport direction intersecting the scanning direction; and a control device configured to control the ink-jet head, the carriage and the transport mechanism to perform recording of the image. The nozzles include a plurality of first nozzles which are aligned at first interval with respect to the transport direction and from which first-type ink droplets are jetted, and a plurality of second nozzles which are aligned at second interval with respect to the transport direction and from which second-type ink droplets different from the first-type ink droplets are jetted.

Abstract: A semiconductor device includes a first circuit that executes a first calculation, a second circuit that includes a first storage unit therein and executes a second calculation, a controller that outputs a first address for specifying a first execution circuit for the first calculation and a second execution circuit for the second calculation, to the first circuit and the second circuit, and controls input of data into the first circuit, and a bus that transfers a result of the first calculation executed by the first circuit to the second circuit, wherein the result of the first calculation can be conditionally used as an address for specifying the second execution circuit.

Abstract: According to an embodiment, a semiconductor device includes an arithmetic device that includes a first storage unit that stores first device-control information for deciding an arithmetic processing to be executed next to an arithmetic processing currently being executed by an arithmetic device and a timing at which the arithmetic processing to be executed next to the arithmetic processing currently being executed by the arithmetic device is executed; and the arithmetic device that includes a second storage unit that stores second device-control information for deciding a content of an operation contained in an arithmetic processing.

Abstract: The semiconductor device includes a controller and a plurality of dynamically reconfigurable circuits connected to one another in series below the controller to perform operations in the manner of a pipeline. The controller inputs data and reconfiguration information to the first one of the dynamically reconfigurable circuits. Each of the dynamically reconfigurable circuits includes a processing unit that performs a data computation, an updating unit that updates the reconfiguration information, and a repetition controlling unit that determines whether to repeat the computation and controls the data and the reconfiguration information.

Abstract: A packet communication device autonomously selects an appropriate operation mode according to a connection environment to an external device before a service of the device is started. When the device is connected to the external buses, connection interface units notify an external device discrimination unit of connection of the device. The external device discrimination unit issues a polling packet to the connected device, discriminates the connected external device on the basis of the response packet, and notifies an operation mode switching unit. The operation mode switching unit selects an operation mode conforming to a connection environment of the packet communication device to the external device and switches the operation mode of the device to the mode.

Abstract: Upstream network interfaces (2-1-2-N) and downstream network interfaces (5-1-5-M) have an upstream PCI-PCI bridge function and a downstream PCI-PCI bridge function, respectively. These network interfaces (2-1-2-N, 5-1-5-M) and a network (3) are incorporated in a system as a single multi-root PCI express switch. The network (3) tunnels TLPs (Transaction Layer Packets) between the upstream network interfaces (2-1-2-N) and the downstream network interfaces (5-1-5-M) or between the downstream network interfaces (5-1-5-M). This enables to distribute and connect a plurality of computers and a plurality of I/Os on a large scale without changing software, root complexes, and I/Os.

Abstract: An information processing system includes a plurality of processors for executing processing according to a predetermined processing request sent from a different device; a switching device for performing data transfer between the individual processors and the different device; and a storage device which is connected to the switching device and enables data transfer to and from the individual processors. At least one of the processors includes a processing request storing unit for storing processing request data sent from the different device to the processor, into the storage device by data transfer. At least another one of the processors includes a processing request reading unit for reading the processing request data stored in the storage device from the storage device by data transfer.

Abstract: A connector holder fixes an optical connector assembled at a leading end of an optical fiber to an optical module having a light input/output end so that the optical fiber and the light input/output end is optically connected. The connector holder is provided with a holding section for storing at least a part of the optical connector, and a cover section attached to the holding section to be freely opened and closed. The cover section is provided with a cover section main body, and a pressing section which presses the optical connector toward the optical module.

Abstract: Any packet loss is detected very quickly by means of only a series of sequence number in a multi-path environment where a transmitter and a receiver are connected to each other by way of a plurality of networks when no inversion of sequence arises in any of the networks. A communication apparatus includes a plurality of sequence buffers arranged at each network to accumulate packets until a sequence acknowledgement and an absence detecting section adapted to determine the occurrence of an absence of a packet when one or more packets are accumulated in all the sequence buffers. With this arrangement, the absence detecting section of the receiver monitors the packets staying in the sequence guaranteeing buffer arranged in each of the network, paying attention to the characteristic that packets are stored in the sequence buffers of all the networks when a packet loss takes place.

Abstract: A print control apparatus includes a generating unit that generates clear-toner plane data based on gloss-control plane data, which contains a gloss control value for specifying a type of a surface effect being a visual or a tactile effect applied to the recording medium and for specifying a region to which the surface effect is applied in the recording medium, and clear plane data, which contains a density value for specifying a transparent image other than the surface effect; and an outputting unit that outputs the clear-toner plane data. When a region where the gloss control value is specified in the gloss-control plane data and a region where the density value is specified in the clear plane data overlap each other, the generating unit sets a value of the clear-toner plane data to the gloss control value or the density value, based on a predetermined condition.

Abstract: In an image forming apparatus, a delivery instruction receiving part receives a delivery instruction for instructing a delivery form a request originator, and a delivering part delivers data indicated by a delivery instruction description in accordance with the delivery instruction indicated by the delivery instruction by a deliver type indicated by the deliver instruction description, so that delivery processes corresponding to a plurality of different delivery types can be conducted. The delivery instruction description is written in a form which can be shared and used for the plurality of different delivery types.

Abstract: Any packet loss is detected very quickly by means of only a series of sequence number in a multi-path environment where a transmitter and a receiver are connected to each other by way of a plurality of networks when no inversion of sequence arises in any of the networks. A communication apparatus includes a plurality of sequence buffers arranged at each network to accumulate packets until a sequence acknowledgement and an absence detecting section adapted to determine the occurrence of an absence of a packet when one or more packets are accumulated in all the sequence buffers. With this arrangement, the absence detecting section of the receiver monitors the packets staying in the sequence guaranteeing buffer arranged in each of the network, paying attention to the characteristic that packets are stored in the sequence buffers of all the networks when a packet loss takes place.