Abstract: The present invention provides a reverse conducting (RC) thyristor of a planar-gate structure for low-and-medium power use which is relatively simple in construction because of employing a planar structure for each of thyristor and diode regions, permits simultaneous formation of the both region and have high-speed performance and a RC thyristor of a buried-gate or recessed-gate structure which has a high breakdown voltage by the use of a buried-gate or recessed-gate structure, permits simultaneous formation of thyristor and diode regions and high-speed, high current switching performance, and the RC thyristor of the planar-gate structure has a construction which comprises an SI thyristor or miniaturized GTO of a planar-gate structure in the thyristor region and an SI diode of a planar structure in the diode region, the diode region having at its cathode side a Schottky contact between n emitters or diode cathode shorted region and the thyristor region having at its anode side an SI anode shorted structure fo

Abstract: In a gate insulated static induction thyristor with a split gate type shorted cathode structure, a first gate of the split gate structure is used as a cathode short-circuit gate and the cathode region is formed in the second gate. A MOS structure is formed on the second gate as a control gate electrode isolated therefrom. Since the channel integration density is high, the area efficiency increases. The MOS gate structure suppresses the minority carrier (hole) storage effect to permit high-speed swtching of the thyristor, and the shorted cathode structure provides for increased maximum controllable current/voltage durability. The split gate structure can be used in combination with planar, buried, recessed and double gate structures.

Abstract: The present invention is to provide a Static Induction semiconductor device with a Static Induction Schottky shorted structure where the main electrode region is composed of regions of higher and lower impurity densities relative to each other, the main electrode forms an ohmic contact with the higher impurity density region and also forms a Schottky contact with a Static Induction Schottky shorted region of the lower impurity density region surrounded by tile higher impurity density region, and it is excellent in turn-off performance and easy to use, by substantially reducing tile minority carrier storage time, the fall time and the quantity of gate pull-out charges in order that charges may easily be pulled out from the cathode or source electrode as well as from the gate electrode at turn-off.

Abstract: In a gate insulated static induction thyristor with a split gate type shorted cathode structure, a first gate region of the split gate structure is used as a cathode short-circuit gate and the cathode region is formed between the first and second gate regions. A MOS structure is formed on the second gate region as a insulated gate control gate region electrode isolated therefrom. The MOS gate structure suppresses the minority carrier (hole) storage effect to permit high-speed switching of the thyristor, and the shorted cathode structure provides for increased maximum controllable current/voltage durability. The split gate structure can be used in combination with planar, buried, recessed and double gate structures.

Abstract: The present invention is to provide a static induction semiconductor device with a distributed main electrode structure and a static induction semiconductor device with a static induction main electrode shorted structure where the main electrode region is composed of regions of higher and lower impurity densities relative to each other and formed partly in contact with the lower impurity density region as well, and alternatively a static induction short-circuit region opposite in conductivity type to the main electrode region is formed in the lower impurity density region surrounded by the higher impurity density region.

Abstract: The present invention is directed to power semiconductor devices and, more particularly, to a semiconductor device with a static induction buffer structure which reduces the resistance of a buffer layer, enhances the injection efficiency of holes from the anode and permits the application of a high-intensity electric field across the cathode and anode, and a semiconductor device with a drift buffer structure in which an impurity density (concentration) gradient is set in a buffer layer to generate an internal electric field for holes to enhance the injection efficiency of holes from the anode and increase the electron storage efficiency or and impurity density (concentration) gradient is set in an anode region to generate an internal electric field for electrons and a high-intensity electric field can be applied across the cathode and anode.

Abstract: The present invention has for its object to provide a planar MOS-controlled thyristor of improved main thyristor turn-ON characteristics and a vertical MOS-controlled thyristor of improved main thyristor turn-ON characteristics and increased integration density. In the planar MOS-controlled thyristor a p-channel MOSFET for turning OFF the main thyristor and an n-channel MOSFET for turning it ON are provided in an integrated form and a channel is provided between the cathode region and a high resistance layer. The current in the channel can be controlled by the base or gate potential through utilization of the J-FET or static induction effect. In the vertical MOS-controlled thyristor a vertical p-channel MOSFET for turning OFF the main thyristor and a vertical n-channel MOSFET for turning it ON are provided in an integrated form and a base layer or channel is provided between the cathode region and a high resistivity layer.

Abstract: A semiconductor device comprises a semiconductive substrate of a low impurity concentration, a channel area of a low impurity concentration formed on the substrate, a source area formed on the channel area and having a high impurity concentration of a conductive type opposite to that of the substrate, a drain area formed on the channel area and having a high impurity concentration of a conductive type opposite to that of the substrate, and an accumulating gate area formed on the channel area and having a conductive type same as that of the substrate. The source area and drain area are arranged in a predetermined direction along the substrate. The accumulating gate area comprises a first part sandwiched between the source area and the drain area and extended in a direction crossing the predetermined direction and second and third parts connected with the first part and approximately extended in the predetermined direction.

Abstract: This invention relates to a PWM power converter for switching a plurality of bridge-connected semiconductor switching elements based on PWM signals. As the semiconductor switching elements, elements with a low ON voltage and small conduction loss, and elements with a small switching loss and capable of high-speed switching are combined to improve power conversion efficiency.

Abstract: A thyristor device comprising an SI (Static induction) thyristor or beam base thyristor and an SIT (static induction transistor) or SIT-mode bipolar transistor connected to the gate of the thyristor in order to make it possible to turn-on and-off a direct current and voltage at a high speed with a light. In the thyristor part, the SIT gate structure or SIT-mode beam base structure exists in the first gate or base region or second gate or base region so that, at the time of the triggering operation, a very high switching efficiency will be obtained.

Abstract: A pair of static induction thyristors, which are coupled in parallel in the opposite bias directions between an AC power source and a load, is turned on by a light signal and is turned off by natural commutation, a light signal or an electric signal. The turn-off light signal is generated within a phase angle of 90.degree. in the time axis around the zero-cross point of the AC voltage from the AC power source.

Abstract: A semiconductor device comprises a semiconductor substrate of a low impurity concentration, a channel region formed on the substrate and having a low impurity concentration, a source region formed on the channel region and having a high impurity concentration of a conductive type opposite to that of the substrate, and a drain region formed on the channel region and having a high impurity concentration of a conductive type opposite to that of the substrate. The source region and the drain region are arranged along a predetermined direction along the substrate. The semiconductor device further includes an accumulating gate region of a conductive type same as that of the substrate, so formed as to surround either one of the source region and drain region, leaving a part of said channel region sandwiched between the source region and the drain region.

Abstract: An integrated light-triggered and light-quenched static induction thyristor and fabrication process thereof adapted in such a manner that an integrated SIPT operates in the normal mode in order to enhance current gain, tail current generated at the light-quenching time is reduced in order to enhance turn-off gain, and an buried-gate type of light-triggered static induction thyristor and a photo-darlington circuit composed of a first and second static induction phototransistors are integrated on a high-resistivity substrate in order to permit manufacturing said thyristor compact as a whole in facilitated processes.

Abstract: A solid state image pick-up device having a number of static induction transistor image sensors arranged in a matrix form, each static induction image sensor includes a drain region formed by an n+ substrate connected to the earth potential, a channel region formed by an n.sup.- epitaxial layer grown on the substrate, a ring-shaped p+ gate region formed in a surface of the epitaxial layer, an n+ source region formed in a part of the surface of the epitaxial layer surrounded by the ring-shaped gate region and a p+ overflow drain region formed in the surface of the substrate underneath the gate region. By adjusting a time duration of a shutter control signal having a positive voltage applied to the overflow drain region, a time period during which photocarriers, i.e. electrons are flown into the gate region and stored therein, can be controlled at will, and an electronic shutter function can be achieved.

Abstract: An integrated light-triggered and light-quenched static induction thyristor and fabrication process thereof adapted in such a manner that an integrated SIPT operates in the normal mode in order to enhance current gain, tail current generated at the light-quenching time is reduced in order to enhance turn-off gain, and a buried-gate type of light-triggered static induction thyristor and a photo-darlington circuit composed of a first and second static induction phototransistors are integrated on a high-resistivity substrate in order to permit manufacturing said thyristor compact as a whole in facilitated processes.

Abstract: The present invention relates generally to a photodetector, and more particularly to a photodetector formed by a static induction transistor. The present invention includes the following constituent elements:In the photodetector formed by a static induction transistor, an n.sup.+ -type buried layer is provided, as a drain or source region of the photodetector, for limiting the thickness of a high resistivity i-type layer between a p.sup.+ -type region forming a gate and a substrate. Letting the wavelength of light incident to the surface of the photodetector and an absorption coefficient for the incident light be represented by .lambda..sub.i and .alpha..sub.i (.lambda..sub.i), respectively, the distance between the in junction of the abrupt pin junction and the surface of the photodetector x.sub.i is ##EQU1## the ratio between the area A(.lambda..sub.i) of each gate portion for selectively detecting light of the specified wavelength .lambda..sub.i and the total area A.sub.

Abstract: A semiconductor imaging device composed of a matrix of pixels, each pixel being implemented with a single static induction transistor. Each static induction transistor includes a pair of principal electrode regions disposed facing each other through a highly resistive channel region. First and second gate regions of the conduction type opposite that of the principal electrode regions is formed in contact with the channel region and used to control the current flow between the two principal electrode regions. A capacitor is formed on at least part of the first gate region, whereby carriers generated by light exitation are stored in the first gate region. The second gate region is formed surrounding the first gate region and is common to all pixels. This construction provides a high-level output signal and good isolation between pixels, with an attendant increase in blooming resistance.

Abstract: A semiconductor imaging device employing SIT (Static Induction Transistor) pixels having in the control gate region of each pixel a capacitor having optimum properties. Each pixel is constituted by an SIT having a pair of principal electrode regions of one conduction type facing one another through a highly resistive channel region. First and second gate regions of the other conduction type in contact with the channel region control the current flow between the two principal electrode regions. A transparent electrode is formed on at least part of the first gate region through a capacitor. Carriers generated by light excitation stored in the first gate region effectively control the current flow between the principal regions. A transparent electrically conductive layer is formed on the first gate region of each SIT through a nitride layer. The conductive layer serves as an electrode to connect the first gate region to the output of a gate control circuit.

Abstract: The present invention provides an optically controlled power converting apparatus using light trigger/light quench electrostatic induction thyristors, as switching elements, which can execute the switching operations at a high speed being when they are supplied with light trigger pulses and light quench pulses. By supplying the light trigger pulses and light quench pulses at the timings corresponding to the pulse width modulation, the light trigger/light quench electrostatic induction thyristors can perform predetermined power converting operations.

Abstract: A solid state image sensor comprising static induction transistors each forming a picture element.Each static induction transistor in the solid state image sensor has a lateral structure in which the source and drain regions are formed by surface regions provided on the same side in an epitaxial layer forming the channel region and a signal charge storage gate region are formed by a buried gate region provided under the channel region and a surface gate region provided on the channel region, so that the source-drain current flows in parallel to the surface of epitaxial layer and is effectively controlled between the buried and surface gate regions.