Abstract: A semiconductor device includes a drift layer of a first conductivity type; and anode layer of a second conductivity type formed on a first main surface side of the drift layer; a field stop layer of the first conductivity type that is formed on a second main surface side of the drift layer and has a higher impurity concentration than the drift layer; and a cathode layer of the first conductivity type that has a higher impurity concentration than the field stop layer. A defect layer for carrier lifetime control is formed by light ion irradiation. In the defect layer, the region from the concentration peak of the light ions to the half-value width ?Lp of the light ion concentration profile does not overlap the depletion layer spreading in the drift layer, and does not overlap the location in the field stop layer of the first conductivity type.

Abstract: A SiC semiconductor device includes: a SiC substrate having a drain layer, a drift layer and a source layer stacked in this order; multiple trenches penetrating the source layer and reaching the drift layer; a gate layer on a sidewall of each trench; an insulation film on the sidewall of each trench covering the gate layer; a source electrode on the source layer; and a diode portion in or under the trench contacting the drift layer to provide a diode. The drift layer between the gate layer on the sidewalls of adjacent two trenches provides a channel region. The diode portion is coupled with the source electrode, and insulated from the gate layer with the insulation film.

Abstract: A SiC semiconductor device includes: a SiC substrate having a drain layer, a drift layer and a source layer stacked in this order; multiple trenches penetrating the source layer and reaching the drift layer; a gate layer on a sidewall of each trench; an insulation film on the sidewall of each trench covering the gate layer; a source electrode on the source layer; and a diode portion in or under the trench contacting the drift layer to provide a diode. The drift layer between the gate layer on the sidewalls of adjacent two trenches provides a channel region. The diode portion is coupled with the source electrode, and insulated from the gate layer with the insulation film.