Patents by Inventor Takato Sekimoto

Takato Sekimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230059197
    Abstract: A movable body control system (SYS) includes a movable body (1) that is movable in a predetermined area (TA) in which a wireless communication network (NW) is built; a control apparatus (6) for controlling the movable body through the wireless communication network; and a measurement apparatus (3) for measuring a communication quality of the wireless communication network in the predetermined area, the control apparatus includes a generation unit (613) for generating, as a target moving route (TGT) for the movable body, a first route avoiding a low quality area (DA1) in which the communication quality does not reach a desired quality in the predetermined area, based on a measured result by the measurement apparatus; and a control unit (614) for controlling the movable body so that the movable body moves along the target moving route.
    Type: Application
    Filed: March 10, 2021
    Publication date: February 23, 2023
    Applicant: NEC Corporation
    Inventor: Takato Sekimoto
  • Patent number: 8261137
    Abstract: An apparatus and method for efficiently processing memory faults. A faulty memory is exchanged with a spare memory when the total number of faults in the memories is over a threshold. After the switching, when the number of faults in a single cache line is over a threshold, a memory page corresponding to the single cache line is blocked.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: September 4, 2012
    Assignee: NEC Corporation
    Inventor: Takato Sekimoto
  • Publication number: 20110179318
    Abstract: An apparatus and method for efficiently processing memory faults. A faulty memory is exchanged with a spare memory when the total number of faults in the memories is over a threshold. After the switching, when the number of faults in a single cache line is over a threshold, a memory page corresponding to the single cache line is blocked.
    Type: Application
    Filed: January 19, 2011
    Publication date: July 21, 2011
    Applicant: NEC CORPORATION
    Inventor: Takato SEKIMOTO