Patents by Inventor Takatoma Toda

Takatoma Toda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020088984
    Abstract: Disclosed is a semiconductor chip mounting substrate 4a bearing semiconductor chips 19a and 19b thereof. The first substrate 4a includes a power source line 22 for supplying a supply voltage potential to the semiconductor chips 19a and 19b, a ground line 23 for supplying a ground voltage potential to the semiconductor chips 19a and 19b, output lines 21a and 21b to which an output signal is supplied from the semiconductor chips 19a and 19b, and an insulator layer 11 for covering the output lines 21a and 21b. The insulator layer 11 is formed so that no insulator layer is arranged in the area between the power source line 22 and the ground line 23.
    Type: Application
    Filed: November 30, 2001
    Publication date: July 11, 2002
    Inventors: Takatoma Toda, Naoki Makino