Patents by Inventor Takatoshi Inazu

Takatoshi Inazu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12197837
    Abstract: According to this invention, it is possible to reduce the load of the user in a work of operating a model described in a hardware description language, and allow the user to readily make a change. This invention provides an information processing apparatus including a hardware processor that emulates, by hardware, operations corresponding to a model described in a hardware description language, and a control unit that controls, in accordance with instructions of a user received from a user terminal, at least one of inputs to the hardware processor and outputs from the hardware processor.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: January 14, 2025
    Assignee: PALTEK CORPORATION
    Inventors: Takatoshi Inazu, Kai Harano, Yasuaki Saita
  • Publication number: 20230035673
    Abstract: According to this invention, it is possible to reduce the load of the user in a work of operating a model described in a hardware description language, and allow the user to readily make a change. This invention provides an information processing apparatus including a hardware processor that emulates, by hardware, operations corresponding to a model described in a hardware description language, and a control unit that controls, in accordance with instructions of a user received from a user terminal, at least one of inputs to the hardware processor and outputs from the hardware processor.
    Type: Application
    Filed: December 3, 2020
    Publication date: February 2, 2023
    Applicant: PALTEK CORPORATION
    Inventors: Takatoshi INAZU, Kai HARANO, Yasuaki SAITA
  • Patent number: 7254804
    Abstract: A method of verifying photomask-pattern-correction results includes steps of cutting away photomask patterns of a region to be subjected to correction, forming photoresist models used for execution of an optical-proximity-effect-correction operation, executing the optical-proximity-effect-correction operation of the photomask patterns with respect to the photoresist models, executing an exposure simulation for simulating photoresist patterns formed on a photoresist film to which the photomask patterns are transferred after the optical-proximity-effect-correction operation, and designating parameters required for executions of the cutting away the photomask patterns of the region, the forming of the photoresist models, the optical-proximity-effect-correction operation, and the exposure simulation.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: August 7, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takatoshi Inazu
  • Publication number: 20050120325
    Abstract: A method of verifying photomask-pattern-correction results includes steps of cutting away photomask patterns of a region to be subjected to correction, forming photoresist models used for execution of an optical-proximity-effect-correction operation, executing the optical-proximity-effect-correction operation of the photomask patterns with respect to the photoresist models, executing an exposure simulation for simulating photoresist patterns formed on a photoresist film to which the photomask patterns are transferred after the optical-proximity-effect-correction operation, and designating parameters required for executions of the cutting away the photomask patterns of the region, the forming of the photoresist models, the optical-proximity-effect-correction operation, and the exposure simulation.
    Type: Application
    Filed: September 30, 2004
    Publication date: June 2, 2005
    Inventor: Takatoshi Inazu