Abstract: A NAND flash memory array includes a select line that is formed from a portion of a first conductive layer and a portion of second conductive layer separated by dielectric, and a connecting portion of a third conductive layer, the connecting portion extending in contact with a side of the portion of the first conductive layer and a side of the portion of the second conductive layer

Abstract: A solid-state imaging device includes: an effective pixel area in which a plurality of pixels having photodiodes (PD) are provided in row and column directions, the effective pixel area being capable of allowing light from outside to be incident in each PD and generating electric signals by photoelectric conversion; and a non-effective pixel area in which a plurality of pixels covered with a light-shielding film are provided, and a reference area and a failure-detection pattern area are formed as sub-areas. Each pixel in the reference area has a PD. The failure-detection pattern area has a configuration such that pixels with PD and pixels without PD are arranged in combination in a predetermined arrangement pattern. Each of pixels in the effective pixel area is driven so as to output a pixel signal, and each of pixels in the non-effective pixel area including the failure-detection pattern area also can be driven so as to output a pixel signal.

Abstract: There are provided an easy-to-use solid-state imaging device which reduces a noise generated, and a method for fabricating such a solid-state imaging device. Among a plurality of MOS transistors comprising the solid-state imaging device 1, a polycrystalline silicon into which a P type impurity is introduced is used to form at least one of gate electrodes 108a and 108b of N type MOS transistors 109a and 109b included in a pixel 5. In this case, the introduction of the P type impurity into the gate electrode 108a or 108b of the N type MOS transistor 109a or 109b, and the introduction of the P type impurity into a gate electrode 108c of a P type MOS transistor 109c are simultaneously performed.