Abstract: A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.

Abstract: A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.

Abstract: The present invention is a method for producing an annealed wafer, wherein, at least, when a boat in which a semiconductor wafer is placed is inserted into a furnace tube, the boat is inserted along with introducing an inert gas into the furnace, so that entirety of the semiconductor wafer to be a product reaches a thermally uniform portion, then an insertion rate of the boat in which the semiconductor wafer is placed is decelerated and/or suspended, so that an interval between the furnace tube and the shutter is maintained for a predetermined time, and then the furnace tube is blocked in with the shutter. Thereby, there can be provided a method for producing an annealed wafer by which during the heat treatment, it can be more certainly prevented that the wafer is contaminated with conductive impurities and that thereby resistivity of the wafer is changed before and after the heat treatment.

Abstract: The present invention provides a method for evaluating dopant contamination of a semiconductor wafer, wherein a resistivity of a bulk portion of the semiconductor wafer is measured by an eddy current method, a resistivity in a surface layer of the semiconductor wafer is measured by a surface photovoltage method, and an amount of dopant contamination of the semiconductor wafer is calculated from a difference between a value of the resistivity of the bulk portion measured by the eddy current method and a value of the resistivity in the surface layer measured by the surface photovoltage method. As a result of this, it is possible to provide the method for evaluating dopant contamination of a semiconductor wafer, which can measure the amount of dopant contamination of a whole surface layer of the semiconductor wafer without contact, nondestructively, and accurately.

Abstract: The present invention is a method for producing an annealed wafer, wherein, at least, when a boat in which a semiconductor wafer is placed is inserted into a furnace tube, the boat is inserted along with introducing an inert gas into the furnace, so that entirety of the semiconductor wafer to be a product reaches a thermally uniform portion, then an insertion rate of the boat in which the semiconductor wafer is placed is decelerated and/or suspended, so that an interval between the furnace tube and the shutter is maintained for a predetermined time, and then the furnace tube is blocked in with the shutter. Thereby, there can be provided a method for producing an annealed wafer by which during the heat treatment, it can be more certainly prevented that the wafer is contaminated with conductive impurities and that thereby resistivity of the wafer is changed before and after the heat treatment.

Abstract: The present invention provides a method for evaluating dopant contamination of a semiconductor wafer, wherein a resistivity of a bulk portion of the semiconductor wafer is measured by an eddy current method, a resistivity in a surface layer of the semiconductor wafer is measured by a surface photovoltage method, and an amount of dopant contamination of the semiconductor wafer is calculated from a difference between a value of the resistivity of the bulk portion measured by the eddy current method and a value of the resistivity in the surface layer measured by the surface photovoltage method. As a result of this, it is possible to provide the method for evaluating dopant contamination of a semiconductor wafer, which can measure the amount of dopant contamination of a whole surface layer of the semiconductor wafer without contact, nondestructively, and accurately.

Abstract: The present invention is a method of producing an annealed wafer wherein a silicon single crystal wafer having a diameter of 200 mm or more produced by the Czochralski (CZ) method is subjected to a high temperature heat treatment in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100–1350° C. for 10–600 minutes, and before the high temperature heat treatmen, a pre-annealing is performed at a temperature less than the temperature of the high temperature heat treatment, so that the growth of slip dislocations is suppressed by growing oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein the generation and growth of slip dislocations generated in a high temperature heat treatment are suppressed and the defect density in the wafer surface layer is lowered even in the case of a silicon single crystal wafer having a large diameter of 200 mm or more, and the annealed wafer.

Abstract: The present invention provides method of producing an annealed wafer wherein a silicon single crystal wafer produced by the Czochralski (CZ) method is subjected to a high temperature annealing in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100–1350° C. for 10–600 minutes, during the annealing the silicon single crystal wafer is supported by a supporting jig only in a central side region of the wafer except for 5 mm or more from a peripheral end of the wafer, and before performing the high temperature annealing, a pre-annealing is performed at a temperature less than the temperature of the high temperature annealing to grow oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein slip dislocations generated in a high temperature annealing can be suppressed even in the case of a silicon single crystal wafer having a large diameter of 300 mm or more, and provided the annealed wafer.

Abstract: The present invention provides an annealed wafer manufacturing method using a heat treatment method causing no change in resistivity of a wafer surface even when a silicon wafer having boron deposited on a surface thereof from an environment is subjected to heat treatment in an insert gas atmosphere and enabling the heat treatment in an ordinary diffusion furnace not requiring a sealed structure for increasing airtightness nor any specific facility such as explosion-proof facility. The present invention also provides an annealed wafer in which a boron concentration in the vicinity of a surface thereof is constant and crystal defects are annihilated.

Abstract: The present invention is a method of producing an annealed wafer wherein a silicon single crystal wafer having a diameter of 200 mm or more produced by the Czochralski (CZ) method is subjected to a high temperature heat treatment in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100-1350° C. for 10-600 minutes, and before the high temperature heat treatmen, a pre-annealing is performed at a temperature less than the temperature of the high temperature heat treatment, so that the growth of slip dislocations is suppressed by growing oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein the generation and growth of slip dislocations generated in a high temperature heat treatment are suppressed and the defect density in the wafer surface layer is lowered even in the case of a silicon single crystal wafer having a large diameter of 200 mm or more, and the annealed wafer.

Abstract: According to the present invention, there are provided a method for producing a silicon single crystal wafer which contains oxygen induced defects by subjecting a silicon single crystal wafer containing interstitial oxygen to a heat treatment wherein the heat treatment includes at least a step of performing a heat treatment using a resistance-heating type heat treatment furnace and a step of performing a heat treatment using a rapid heating and rapid cooling apparatus, and a silicon single crystal wafer produced by the method. There can be provided a method for producing a silicon single crystal wafer which has a DZ layer of higher quality compared with a conventional wafer in a wafer surface layer part and has oxygen induced defects at a sufficient density in a bulk part and the silicon single crystal wafer.

Abstract: The present invention provides method of producing an annealed wafer wherein a silicon single crystal wafer produced by the Czochralski (CZ) method is subjected to a high temperature annealing in an atmosphere of an argon gas, a hydrogen gas, or a mixture gas thereof at a temperature of 1100-1350° C. for 10-600 minutes, during the annealing the silicon single crystal wafer is supported by a supporting jig only in a central side region of the wafer except for 5 mm or more from a peripheral end of the wafer, and before performing the high temperature annealing, a pre-annealing is performed at a temperature less than the temperature of the high temperature annealing to grow oxide precipitates. Thereby, there is provided a method of producing an annealed wafer wherein slip dislocations generated in a high temperature annealing can be suppressed even in the case of a silicon single crystal wafer having a large diameter of 300 mm or more, and provided the annealed wafer.

Abstract: There is provided a manufacturing process for an annealed wafer capable of reducing boron contamination occurring while annealing is performed in a state where a wafer surface after cleaning is exposed to a gas in Ar atmosphere to suppress a change in resistivity due to an increase in a boron concentration in the vicinity of the wafer surface after annealing and manufacture an annealed wafer in which a difference in a boron concentration between a surface layer portion thereof and a bulk portion thereof is essentially not a problem even if a silicon wafer having a comparative low boron concentration (1×1016 atoms/cm3 or less) is used as the annealed wafer. The manufacturing process for an annealed wafer comprises: cleaning a silicon wafer; and loading the silicon wafer into a heat treatment furnace to heat-treat the silicon wafer in an Ar atmosphere, wherein an aqueous solution including hydrofluoric acid is used as a final cleaning liquid in the cleaning.

Abstract: According to the present invention, there are provided a method for producing a silicon single crystal wafer which contains oxygen induced defects by subjecting a silicon single crystal wafer containing interstitial oxygen to a heat treatment wherein the heat treatment includes at least a step of performing a heat treatment using a resistance-heating type heat treatment furnace and a step of performing a heat treatment using a rapid heating and rapid cooling apparatus, and a silicon single crystal wafer produced by the method. There can be provided a method for producing a silicon single crystal wafer which has a DZ layer of higher quality compared with a conventional wafer in a wafer surface layer part and has oxygen induced defects at a sufficient density in a bulk part and the silicon single crystal wafer.

Abstract: The present invention provides an annealed wafer manufacturing method using a heat treatment method causing no change in resistivity of a wafer surface even when a silicon wafer having boron deposited on a surface thereof from an environment is subjected to heat treatment in an insert gas atmosphere and enabling the heat treatment in an ordinary diffusion furnace not requiring a sealed structure for increasing airtightness nor any specific facility such as explosion-proof facility. The present invention also provides an annealed wafer in which a boron concentration in the vicinity of a surface thereof is constant and crystal defects are annihilated.

Abstract: There is provided a manufacturing process for an annealed wafer capable of reducing boron contamination occurring while annealing is performed in a state where a wafer surface after cleaning is exposed to a gas in Ar atmosphere to suppress a change in resistivity due to an increase in a boron concentration in the vicinity of the wafer surface after annealing and manufacture an annealed wafer in which a difference in a boron concentration between a surface layer portion thereof and a bulk portion thereof is essentially not a problem even if a silicon wafer having a comparative low boron concentration (1×1016 atoms/cm3 or less) is used as the annealed wafer. The manufacturing process for an annealed wafer comprises: cleaning a silicon wafer; and loading the silicon wafer into a heat treatment furnace to heat-treat the silicon wafer in an Ar atmosphere, wherein an aqueous solution including hydrofluoric acid is used as a final cleaning liquid in the cleaning.

Abstract: In the preparation stage before the manufacturing of the single crystal thin film 13, growth conditions are determined by conducting a vapor phase growth without rotating the rotatable holder 14 on its axis and making adjustments such that the growth rate of the single crystal thin film 13 is laterally asymmetric with respect to the virtual center axis on the holder 14 parallel to the feeding direction of the source material gas 19, and then said single crystal thin film is manufactured based on said growth conditions.

Abstract: A process for growing a silicon epitaxial layer on the main surface of a silicon substrate wafer using an apparatus for growing a silicon epitaxial layer is disclosed. The apparatus comprises a central injector passing a flow of a reactive gas past a central part of a horizontal chamber, peripheral injectors passing peripheral flows of the reactive gas past peripheral part of the chamber, a first controller controlling the mass flows of at least one of the silicon source, the dopant and hydrogen of the reactive gas fed by the central injector, and a second controller controlling the mass flows of at least one of the silicon source, the dopant and hydrogen fed by the peripheral injectors independently of the first controller. The process comprises control steps independently controlling the mass flows of the reactive gas by the first controller and the second controller.

Abstract: A process for growing a silicon epitaxial layer on the main surface of a silicon substrate wafer using an apparatus for growing a silicon epitaxial layer is disclosed. The apparatus comprises a central injector passing a flow of a reactive gas past a central part of a horizontal chamber, peripheral injectors passing peripheral flows of the reactive gas past a peripheral part of the chamber, a first controller controlling the mass flows of at least one of the silicon source, the dopant and hydrogen of the reactive gas fed by the central injector, and a second controller controlling the mass flows of at least one of the silicon source, the dopant and hydrogen fed by the peripheral injectors independently of the first controller. The process comprises control steps independently controlling the mass flows of the reactive gas by the first contoller and the second controller.

Abstract: A method of measuring pattern shift of a semiconductor wafer with a high accuracy in a short period of time is disclosed, wherein a pattern composed of a groove or a ridge is formed on the semiconductor wafer, then at least one oxide film layer extending over and across the pattern is formed, subsequently, after an epitaxial growing process is performed to form an epitaxial layer over the semiconductor wafer, the lateral position of the pattern is measured both on the epitaxial layer and on the oxide film layer, and after that the position of the pattern measured at the epitaxial layer is compared with the lateral position of the pattern measured at the oxide film layer, thereby determining a displacement of the pattern.