Abstract: Provided is a semiconductor laser element including: a resonator structure; and a first reflection film and a second reflection film provided on a non-emission end surface of the resonator structure and an emission end surface of the resonator structure, respectively. Reflectance R of the second reflection film at a gain wavelength satisfies the following relational expression: R1?R?R(Oc)×C where R1 is reflectance of the second reflection film when the resonator structure performs laser oscillation with power 1.4 times a minimum value of threshold power which is minimum power for the resonator structure to perform the laser oscillation, R(Oc) is reflectance of the external resonance mirror, and C is a ratio of light, which is reflected by the external resonance mirror and is incident in the resonator structure, to light which is reflected by the external resonance mirror.

Abstract: A method for manufacturing a group III nitride semiconductor without causing adverse effects on device characteristics includes: preparing a group III nitride substrate having a first group III nitride layer and a second group III nitride layer laminated in this order from a back-surface side to a front-surface side, the first group III nitride layer being a layer having a transmittance of 60% or more for a predetermined wavelength of 400 nm to 700 nm, the second group III nitride layer being a layer provided on the first group III nitride layer and containing impurity oxygen in a concentration of 1×1020 cm?3 or more and having a transmittance of 0.

Abstract: A method for manufacturing a group III nitride semiconductor without causing adverse effects on device characteristics includes: preparing a group III nitride substrate having a first group III nitride layer and a second group III nitride layer laminated in this order from a back-surface side to a front-surface side, the first group III nitride layer being a layer having a transmittance of 60% or more for a predetermined wavelength of 400 nm to 700 nm, the second group III nitride layer being a layer provided on the first group III nitride layer and containing impurity oxygen in a concentration of 1×1020 cm?3 or more and having a transmittance of 0.

Abstract: A Group III nitride semiconductor substrate capable of identifying a crystal orientation with high precision and a method for manufacturing the Group III nitride semiconductor substrate. The Group III nitride semiconductor substrate has a principal plane including a {0001} plane and is cleaved with reference to a prescribed crystal orientation. The Group III nitride semiconductor substrate includes a first orientation identification line which is located at an end portion of the principal plane when viewed in a plan view, a second orientation identification line which has an angular deviation relative to the prescribed crystal orientation smaller than that of the first orientation identification line, and a marker which identifies the second orientation identification line.

Abstract: There are provided an inspection method of a compound semiconductor substrate that can have the amount of impurities at the surface of the compound semiconductor substrate reduced, a compound semiconductor substrate, a surface treatment method of a compound semiconductor substrate, and a method of producing a compound semiconductor crystal. In the inspection method of the surface of the compound semiconductor substrate, the surface roughness Rms of the compound semiconductor substrate is measured using an atomic force microscope at the pitch of not more than 0.4 nm in a scope of not more than 0.2 ?m square. The surface roughness Rms of the compound semiconductor substrate measured by the inspection method is not more than 0.2 nm.

Abstract: There are provided an inspection method of a compound semiconductor substrate that can have the amount of impurities at the surface of the compound semiconductor substrate reduced, a compound semiconductor substrate, a surface treatment method of a compound semiconductor substrate, and a method of producing a compound semiconductor crystal. In the inspection method of the surface of the compound semiconductor substrate, the surface roughness Rms of the compound semiconductor substrate is measured using an atomic force microscope at the pitch of not more than 0.4 nm in a scope of not more than 0.2 ?m square. The surface roughness Rms of the compound semiconductor substrate measured by the inspection method is not more than 0.2 nm.

Abstract: Compound-semiconductor-wafer manufacturing whereby particle adherence, and obverse-surface oxidization and alteration are slight and the use of organic solvents is reduced. An adsorption pad is bonded to a polishing plate, and a wafer being adsorbed onto the adsorption pad without using wax is polished and thereafter stored within purified water without drying. Since storage is within purified water, particle adherence, and obverse-surface oxidization and alteration turn out to be slight, yielding a high-quality wafer. In the cleaning procedure following the aquatic storage, organic solvent washing is omitted. This allows the use/waste volume of noxious organic solvent to be reduced.

Abstract: Compound-semiconductor-wafer manufacturing whereby particle adherence, and obverse-surface oxidization and alteration are slight and the use of organic solvents is reduced. An adsorption pad is bonded to a polishing plate, and a wafer being adsorbed onto the adsorption pad without using wax is polished and thereafter stored within purified water without drying. Since storage is within purified water, particle adherence, and obverse-surface oxidization and alteration turn out to be slight, yielding a high-quality wafer. In the cleaning procedure following the aquatic storage, organic solvent washing is omitted. This allows the use/waste volume of noxious organic solvent to be reduced.