Patents by Inventor Takatosi Nakanisi

Takatosi Nakanisi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5164363
    Abstract: A substrate to be deposited with a superconducting oxide thin film thereon is set a reaction furnace. An organic metal source gas and oxygen-containing gas are alternately introduced into the reactor to pyrolyze, thereby depositing the superconducting oxide thin film containing metal elements of the organic metal at which time an inert gas is used as a carrier gas for the carrier gas.
    Type: Grant
    Filed: May 15, 1991
    Date of Patent: November 17, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Eguchi, Takatosi Nakanisi, Rie Satoh
  • Patent number: 4348981
    Abstract: A vertical type vapor-phase growth apparatus comprises a vapor-phase growth reactor constituted of an upper section defining an upper chamber having a lateral cross-section of about 200 cm.sup.2 and a lower section defining a lower chamber having a lateral cross-sectional area greater than, but smaller than four times the cross-sectional area of, the upper chamber, and a support for a semiconductor substrate disposed within the lower chamber. The support is in the form of a silicon plate on which a sample is directly placed.
    Type: Grant
    Filed: January 26, 1981
    Date of Patent: September 14, 1982
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Takatosi Nakanisi, Atsushi Tanaka, Takashi Udagawa
  • Patent number: 4290385
    Abstract: A vertical type vapor-phase growth apparatus comprises a vapor-phase growth reactor constituted of an upper section defining an upper chamber having a lateral cross-section of about 200 cm.sup.2 and a lower section defining a lower chamber having a lateral cross-sectional area greater than, but smaller than four times the cross-sectional area of, the upper chamber, and a support for a semiconductor substrate disposed within the lower chamber.
    Type: Grant
    Filed: July 5, 1979
    Date of Patent: September 22, 1981
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Takatosi Nakanisi, Atsushi Tanaka, Takashi Udagawa