Patents by Inventor Takaya Hoshino

Takaya Hoshino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967915
    Abstract: The vibration and noise generated in a permanent magnet synchronous motor are effectively suppressed. A motor control device 1 comprises: a triangular wave generation unit 17 which generates a triangular wave signal Tr that is a carrier wave, a carrier frequency adjustment unit 16 which adjusts a carrier frequency fc that represents a frequency of the triangular wave signal Tr, and a gate signal generation unit 18 which performs pulse-width modulation on three-phase voltage commands Vu*, Vv*, Vw* according to a torque command T* using the triangular wave signal Tr, thereby generating a gate signal for controlling an operation of an inverter. The carrier frequency adjustment unit 16 adjusts the carrier frequency fc so as to change a voltage phase error ??v representing a phase difference of the three-phase voltage commands Vu*, Vv*, Vw* and the triangular wave signal Tr based on the torque command T*, and a rotation speed ?r of a motor.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: April 23, 2024
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Takaya Tsukagoshi, Takafumi Hara, Katsuhiro Hoshino, Toshiyuki Ajima
  • Patent number: 8421922
    Abstract: A display device includes: a frame rate conversion section performing frame rate conversion through performing a frame interpolation process on a composite picture frame with use of a motion vector, in which the composite picture frame is generated through superimposing an OSD picture, i.e., on-screen display picture, on a picture frame; and a display section performing picture display based on a frame-rate-converted composite picture frame provided from the frame rate conversion section. The frame rate conversion section selectively performs the frame interpolation process to each pixel or to every plural pixels in the composite picture frame based on OSD region information indicating an OSD picture region.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: April 16, 2013
    Assignee: Sony Corporation
    Inventor: Takaya Hoshino
  • Patent number: 8284306
    Abstract: An image signal processing unit includes a frame rate conversion circuit performing double frame rate conversion on an input image signal from a first frame frequency to a second frame frequency. When performing frame rate conversion with the motion correction process, a motion vector is determined between a first frame image and a third frame image, and three interpolation frame images are formed through the motion correction process to the first frame image based on the motion vector, and are inserted between the first and third frame images so as to establish the second frame frequency. When performing frame rate conversion without the motion correction process, an interpolation frame image same as the first frame image is inserted between the first and second frame images, and an interpolation frame image same as the second frame image is inserted between the second and third frame images.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: October 9, 2012
    Assignee: Sony Corporation
    Inventors: Takaya Hoshino, Shinichiro Miyazaki, Seiko Imai
  • Publication number: 20110285902
    Abstract: A display device includes: a frame rate conversion section performing frame rate conversion through performing a frame interpolation process on a composite picture frame with use of a motion vector, in which the composite picture frame is generated through superimposing an OSD picture, i.e., on-screen display picture, on a picture frame; and a display section performing picture display based on a frame-rate-converted composite picture frame provided from the frame rate conversion section. The frame rate conversion section selectively performs the frame interpolation process to each pixel or to every plural pixels in the composite picture frame based on OSD region information indicating an OSD picture region.
    Type: Application
    Filed: April 4, 2011
    Publication date: November 24, 2011
    Applicant: Sony Corporation
    Inventor: Takaya HOSHINO
  • Publication number: 20100033620
    Abstract: An image signal processing unit includes a frame rate conversion circuit performing double frame rate conversion on an input image signal from a first frame frequency to a second frame frequency. When performing frame rate conversion with the motion correction process, a motion vector is determined between a first frame image and a third frame image, and three interpolation frame images are formed through the motion correction process to the first frame image based on the motion vector, and are inserted between the first and third frame images so as to establish the second frame frequency. When performing frame rate conversion without the motion correction process, an interpolation frame image same as the first frame image is inserted between the first and second frame images, and an interpolation frame image same as the second frame image is inserted between the second and third frame images.
    Type: Application
    Filed: August 3, 2009
    Publication date: February 11, 2010
    Applicant: Sony Corporation
    Inventors: Takaya Hoshino, Shinichiro Miyazaki, Seiko Imai
  • Patent number: 7425990
    Abstract: To realize a motion compensation device capable of more appropriately compensating the movement of a video signal subjected to double-speed conversion. A motion vector between an image of a current field in a double-speed-converted video signal and an image of a reference field that is one frame or two frames later is detected, the pixels of the current field are shifted based on the motion vector and the pixels of the reference field are shifted in an opposite direction based on the motion vector. Then simple averaging or weighted average according to the shift amount is performed on the pixels of the current field and the pixels of the reference field to compensate the current field, thereby being capable of compensating the movement between fields so as to be much smoother than conventional cases.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: September 16, 2008
    Assignee: Sony Corporation
    Inventors: Takaya Hoshino, Kazuhiko Nishibori, Toshio Sarugaku, Masuyoshi Kurokawa
  • Patent number: 7227897
    Abstract: A vector motion detector is provided which corrects the quantity of a motion vector determined with the block matching technique between a reference block taking a reference pixel extracted from a current frame as its origin and a search block extracted from a reference frame and moving within or along the circumference of a search range and which is outside the search range. The vector motion detector makes the motion vector quantity correction so that the motion vector will fall within the search rang. Thus, it can provide a smooth motion of even an image that moves fast.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: June 5, 2007
    Assignee: Sony Corporation
    Inventors: Kazuhiko Nishibori, Koji Aoyama, Makoto Kondo, Takaya Hoshino, Yukihiko Mogi
  • Patent number: 7221403
    Abstract: The present invention provides an image signal processing apparatus and a method thereof which perform double-speed conversion on images subjected to telecine conversion and in which a first field is specified based on difference values between pixel signal levels calculated with respect to respective detected pixels, write pixel positions which are shifted from the positions of the detected pixels in the vector directions of motion vectors are calculated in a field following the first field, the calculated write pixel positions are stored in correspondence with the motion vectors, interpolation pixel data is calculated from pixel data read from the first field in correspondence with the stored write pixel positions and motion vectors, and the calculated interpolation pixel data is written into the write pixel positions.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: May 22, 2007
    Assignee: Sony Corporation
    Inventors: Koji Aoyama, Kazuhiko Nishibori, Makoto Kondo, Takaya Hoshino
  • Patent number: 7221404
    Abstract: To enable a satisfactory suppression of overemphasized component after converting the number of scanning lines of video signal, when the video signal is converted in the number of scanning lines and a high-frequency component at least in a vertical direction of the converted video signal is emphasized, signals delayed by a plurality of stages of time equal to or more than a time required for converting the number of scanning lines are obtained by a delay circuit 18, and an appropriate delay signal is selected from among the plurality of delay signals by a selection circuit 19. The selected delay signal is compared with the emphasized video signal in emphasized-component detector circuits 16a, 16b and the overemphasized component is detected. Processing to suppress the emphasis is performed by suppressor circuits 13a, 13b with respect to a portion where the overemphasized signal component is detected.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: May 22, 2007
    Assignee: Sony Corporation
    Inventors: Seiko Imai, Toshio Sarugaku, Naoki Kaneko, Takaya Hoshino
  • Patent number: 7215377
    Abstract: The present invention provides an image signal processing apparatus and a method thereof in which each of the fields forming the unit-frame is specified, with respect to the inputted image signal, based on a difference value calculated in signal level between a detected pixel in a current field and a detected pixel at the same position in a field which comes one frame behind the current field, a motion vector for a field which comes two frames behind the current field is detected, with respect to the detected pixel in the current field, the detected pixel is shifted, with respect to the specified first field, in a direction opposite to the motion vector within the range of the detected motion vector, the detected pixel is shifted, with respect to the specified fourth field, in a direction along the motion vector, and the detected pixels is shifted, with respect to the specified second and third fields, so as to make the pixels gradually closer to the pixel position shifted with respect to the fourth field, in
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: May 8, 2007
    Assignee: Sony Corporation
    Inventors: Takaya Hoshino, Toshio Sarugaku, Ikuo Someya, Makoto Kondo, Kazuhiko Nishibori, Koji Aoyama, Yukihiko Mogi, Nobuo Ueki, Masuyoshi Kurokawa
  • Patent number: 7050108
    Abstract: It is determined whether each block (51) including a plurality of pixels extracted from a basic field (30) has an edge or not, and then which state, stationary or non-stationary, each of the pixels forming together the block (51) determined to have an edge is. There is calculated an absolute value of a difference between a pixel determined to be non-stationary and a pixel (91 or 92) in each pixel position in a reference field (40) or pixels (82 to 85) included in the reference field and adjacent to the non-stationary pixel, and a correlation is found between such pixels in consideration according to the calculated difference absolute-value. A motion vector is determined by the block matching method according to results of the determination, and allocated to each of the pixels. Thus, the motion vector of each block is corrected to an accurate one of each of the pixels.
    Type: Grant
    Filed: May 19, 2003
    Date of Patent: May 23, 2006
    Assignee: Sony Corporation
    Inventors: Kazuhiko Nishibori, Koji Aoyama, Yukihiko Mogi, Takaya Hoshino, Makoto Kondo
  • Publication number: 20050264692
    Abstract: To realize a motion compensation device capable of more appropriately compensating the movement of a video signal subjected to double-speed conversion. A motion vector between an image of a current field in a double-speed-converted video signal and an image of a reference field that is one frame or two frames later is detected, the pixels of the current field are shifted based on the motion vector and the pixels of the reference field are shifted in an opposite direction based on the motion vector. Then simple averaging or weighted average according to the shift amount is performed on the pixels of the current field and the pixels of the reference field to compensate the current field, thereby being capable of compensating the movement between fields so as to be much smoother than conventional cases.
    Type: Application
    Filed: May 12, 2004
    Publication date: December 1, 2005
    Inventors: Takaya Hoshino, Kazuhiko Nishibori, Toshio Sarugaku, Masuyoshi Kurokawa
  • Patent number: 6947094
    Abstract: An image signal processing apparatus according to the present invention receives an image signal inputted thereto that is generated by subjecting a telecine-converted image to double speed conversion, in which signal one film frame is formed by four fields, identifies a first field on the basis of a difference value calculated between pixel signal levels, and shifts the position of a detected pixel in a vector direction of a motion vector such that an amount of shift is progressively increased as transition is made from the identified first field to the subsequent fields.
    Type: Grant
    Filed: October 8, 2002
    Date of Patent: September 20, 2005
    Assignee: Sony Corporation
    Inventors: Takaya Hoshino, Toshio Sarugaku, Ikuo Someya, Makoto Kondo, Nobuo Ueki, Masuyoshi Kurokawa, Kazuhiko Nishibori, Koji Aoyama, Yukihiko Mogi
  • Publication number: 20050062886
    Abstract: The present invention provides an image signal processing apparatus and a method thereof in which each of the fields forming the unit-frame is specified, with respect to the inputted image signal, based on a difference value calculated in signal level between a detected pixel in a current field and a detected pixel at the same position in a field which comes one frame behind the current field, a motion vector for a field which comes two frames behind the current field is detected, with respect to the detected pixel in the current field, the detected pixel is shifted, with respect to the specified first field, in a direction opposite to the motion vector within the range of the detected motion vector, the detected pixel is shifted, with respect to the specified fourth field, in a direction along the motion vector, and the detected pixels is shifted, with respect to the specified second and third fields, so as to make the pixels gradually closer to the pixel position shifted with respect to the fourth field, in
    Type: Application
    Filed: December 13, 2002
    Publication date: March 24, 2005
    Inventors: Takaya Hoshino, Toshio Sarugaku, Ikuo Someya, Makoto Kondo, Kazuhiko Nishibori, Koji Aoyama, Yukihiko Mogi, Nobuo Ueki, Masuyoshi Kurokawa
  • Publication number: 20050012857
    Abstract: The present invention provides an image signal processing apparatus and a method thereof which perform double-speed conversion on images subjected to telecine conversion and in which a first field is specified based on difference values between pixel signal levels calculated with respect to respective detected pixels, write pixel positions which are shifted from the positions of the detected pixels in the vector directions of motion vectors are calculated in a field following the first field, the calculated write pixel positions are stored in correspondence with the motion vectors, interpolation pixel data is calculated from pixel data read from the first field in correspondence with the stored write pixel positions and motion vectors, and the calculated interpolation pixel data is written into the write pixel positions.
    Type: Application
    Filed: December 13, 2002
    Publication date: January 20, 2005
    Inventors: Koji Aoyama, Kazuhiko Nishibori, Makoto Kondo, Takaya Hoshino
  • Publication number: 20050002637
    Abstract: To enable a satisfactory suppression of overemphasized component after converting the number of scanning lines of video signal, when the video signal is converted in the number of scanning lines and a high-frequency component at least in a vertical direction of the converted video signal is emphasized, signals delayed by a plurality of stages of time equal to or more than a time required for converting the number of scanning lines are obtained by a delay circuit 18, and an appropriate delay signal is selected from among the plurality of delay signals by a selection circuit 19. The selected delay signal is compared with the emphasized video signal in emphasized-component detector circuits 16a, 16b and the overemphasized component is detected. Processing to suppress the emphasis is performed by suppressor circuits 13a, 13b with respect to a portion where the overemphasized signal component is detected.
    Type: Application
    Filed: August 15, 2003
    Publication date: January 6, 2005
    Inventors: Seiko Imai, Toshio Sarugaku, Naoki Kaneko, Takaya Hoshino
  • Publication number: 20030227973
    Abstract: A vector motion detector is provided which corrects the quantity of a motion vector determined with the block matching technique between a reference block taking a reference pixel extracted from a current frame as its origin and a search block extracted from a reference frame and moving within or along the circumference of a search range and which is outside the search range. The vector motion detector makes the motion vector quantity correction so that the motion vector will fall within the search rang. Thus, it can provide a smooth motion of even an image that moves fast.
    Type: Application
    Filed: April 2, 2003
    Publication date: December 11, 2003
    Inventors: Kazuhiko Nishibori, Koji Aoyama, Makoto Kondo, Takaya Hoshino, Yukihiko Mogi
  • Publication number: 20030215016
    Abstract: It is determined whether each block (51) including a plurality of pixels extracted from a basic field (30) has an edge or not, and then which state, stationary or non-stationary, each of the pixels forming together the block (51) determined to have an edge is. There is calculated an absolute value of a difference between a pixel determined to be non-stationary and a pixel (91 or 92) in each pixel position in a reference field (40) or pixels (82 to 85) included in the reference field and adjacent to the non-stationary pixel, and a correlation is found between such pixels in consideration according to the calculated difference absolute-value. A motion vector is determined by the block matching method according to results of the determination, and allocated to each of the pixels. Thus, the motion vector of each block is corrected to an accurate one of each of the pixels.
    Type: Application
    Filed: May 19, 2003
    Publication date: November 20, 2003
    Inventors: Kazuhiko Nishibori, Koji Aoyama, Yukihiko Mogi, Takaya Hoshino, Makoto Kondo
  • Publication number: 20030107672
    Abstract: An image signal processing apparatus according to the present invention receives an image signal inputted thereto that is generated by subjecting a telecine-converted image to double speed conversion, in which signal one film frame is formed by four fields, identifies a first field on the basis of a difference value calculated between pixel signal levels, and shifts the position of a detected pixel in a vector direction of a motion vector such that an amount of shift is progressively increased as transition is made from the identified first field to the subsequent fields.
    Type: Application
    Filed: October 8, 2002
    Publication date: June 12, 2003
    Inventors: Takaya Hoshino, Toshio Sarugaku, Ikuo Someya, Makoto Kondo, Nobuo Ueki, Masuyoshi Kurokawa, Kazuhiko Nishibori, Koji Aoyama, Yukihiko Mogi
  • Patent number: 6516088
    Abstract: An NTSC signal is supplied to a first area extracting circuit and a second area extracting circuit. The first area extracting circuit extracts class taps from the NTSC signal. The second area extracting circuit extracts predictive taps from the NTSC signal. The first area extracting circuit extracts pixels in predetermined positions from same phase pixels as a considered pixel. Based on level differences between extracted pixels, a pattern detecting section performs a class categorization. A class code determining section generates class codes based on the result of the class categorization and supplies the generated class codes to a coefficient memory. The coefficient memory outputs pre-stored predictive coefficients based on the class codes to a predictive calculating section.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: February 4, 2003
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Takaya Hoshino, Hideo Nakaya, Satoshi Inoue, Shizuo Chikaoka