Patents by Inventor Takaya Kusabe
Takaya Kusabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8305001Abstract: A light-emitting diode driver circuit includes: a first-rectifier circuit to output a first-rectified voltage; a transformer including primary and secondary coils and an auxiliary coil inductively coupled to the primary or secondary coils, the primary coil being applied with the first-rectified voltage; a transistor connected in series to the primary coil; a second-rectifier circuit to output a second-rectified voltage obtained by rectifying a voltage generated in the auxiliary coil; a capacitor to be charged with the second-rectified voltage; and a control circuit to control on and off of the transistor based on a charging voltage of the capacitor so that the charging voltage becomes equal to a predetermined voltage, the secondary coil outputting a voltage that varies with a frequency corresponding to a frequency of the first-rectified voltage and that corresponds to a turns ratio between the primary and secondary coils, as a voltage for driving a light-emitting diode.Type: GrantFiled: July 21, 2010Date of Patent: November 6, 2012Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd.Inventors: Fumio Horiuchi, Toru Imaizumi, Takaya Kusabe
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Patent number: 8283681Abstract: A lighting device including a metal substrate to prevent temperature rise of LED chip is offered. The lighting device includes the metal substrate, an anode or cathode electrode of the LED chip disposed on the metal substrate, brazing materials connecting the LED chip and the metal substrate, and a groove formed in the anode or cathode electrode. Forming the groove can prevent an occurrence of a crack in the brazing materials. Also, a lighting device includes the metal substrate, an anode and cathode electrode of the LED chip disposed on the metal substrate and brazing materials connecting the LED chip and the metal substrate. Further, a slit is formed in the metal substrate between the anode and cathode electrode. Forming the slit in the metal substrate can prevent an occurrence of a crack in the brazing materials.Type: GrantFiled: October 15, 2010Date of Patent: October 9, 2012Assignees: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.Inventors: Noriaki Sakamoto, Naoki Tanahashi, Tsuyoshi Hasegawa, Takaya Kusabe, Masahiko Mizutani, Hideki Mizuhara, Yoshinari Sakuma
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Patent number: 8183090Abstract: To reduce connection defects between a circuit substrate provided on a core substrate and a circuit to be mounted thereon, thereby improving reliability as a multilayered device mounting substrate. The device mounting substrate includes: a first circuit substrate composed of a substrate, an insulating layer formed on this substrate, and a first conductive layer (including conductive parts) formed on this insulating layer; and a second circuit substrate mounted on the first circuit substrate, being composed of a base, a second conductive layer (including conductive parts) formed on the bottom of the base, and a third conductive layer (including conductive parts) formed on the top of the base. Here, the first and second circuit substrates are bonded by pressure so that the first and second conductive parts are laminated and embedded together into the insulating layer.Type: GrantFiled: August 13, 2010Date of Patent: May 22, 2012Assignee: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Hideki Mizuhara, Takaya Kusabe, Sadamichi Takakusaki
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Publication number: 20110241025Abstract: A lighting device including a metal substrate to prevent temperature rise of LED chip is offered. The lighting device includes the metal substrate, an anode or cathode electrode of the LED chip disposed on the metal substrate, brazing materials connecting the LED chip and the metal substrate, and a groove formed in the anode or cathode electrode. Forming the groove can prevent an occurrence of a crack in the brazing materials. Also, a lighting device includes the metal substrate, an anode and cathode electrode of the LED chip disposed on the metal substrate and brazing materials connecting the LED chip and the metal substrate. Further, a slit is formed in the metal substrate between the anode and cathode electrode. Forming the slit in the metal substrate can prevent an occurrence of a crack in the brazing materials.Type: ApplicationFiled: October 15, 2010Publication date: October 6, 2011Applicants: SANYO ELECTRIC CO., LTD., SANYO SEMICONDUCTOR CO., LTD.Inventors: Noriaki SAKAMOTO, Naoki Tanahashi, Tsuyoshi Hasegawa, Takaya Kusabe, Masahiko Mizutani, Hideki Mizuhara, Yoshinari Sakuma
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Publication number: 20110025225Abstract: A light-emitting diode driver circuit includes: a first-rectifier circuit to output a first-rectified voltage; a transformer including primary and secondary coils and an auxiliary coil inductively coupled to the primary or secondary coils, the primary coil being applied with the first-rectified voltage; a transistor connected in series to the primary coil; a second-rectifier circuit to output a second-rectified voltage obtained by rectifying a voltage generated in the auxiliary coil; a capacitor to be charged with the second-rectified voltage; and a control circuit to control on and off of the transistor based on a charging voltage of the capacitor so that the charging voltage becomes equal to a predetermined voltage, the secondary coil outputting a voltage that varies with a frequency corresponding to a frequency of the first-rectified voltage and that corresponds to a turns ratio between the primary and secondary coils, as a voltage for driving a light-emitting diode.Type: ApplicationFiled: July 21, 2010Publication date: February 3, 2011Applicants: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Fumio Horiuchi, Toru Imaizumi, Takaya Kusabe
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Patent number: 7851921Abstract: To reduce connection defects between a circuit substrate provided on a core substrate and a circuit to be mounted thereon, thereby improving reliability as a multilayered device mounting substrate. The device mounting substrate includes: a first circuit substrate composed of a substrate, an insulating layer formed on this substrate, and a first conductive layer (including conductive parts) formed on this insulating layer; and a second circuit substrate mounted on the first circuit substrate, being composed of a base, a second conductive layer (including conductive parts) formed on the bottom of the base, and a third conductive layer (including conductive parts) formed on the top of the base. Here, the first and second circuit substrates are bonded by pressure so that the first and second conductive parts are laminated and embedded together into the insulating layer.Type: GrantFiled: July 30, 2007Date of Patent: December 14, 2010Assignee: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Hideki Mizuhara, Takaya Kusabe, Sadamichi Takakusaki
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Publication number: 20100299920Abstract: To reduce connection defects between a circuit substrate provided on a core substrate and a circuit to be mounted thereon, thereby improving reliability as a multilayered device mounting substrate. The device mounting substrate includes: a first circuit substrate composed of a substrate, an insulating layer formed on this substrate, and a first conductive layer (including conductive parts) formed on this insulating layer; and a second circuit substrate mounted on the first circuit substrate, being composed of a base, a second conductive layer (including conductive parts) formed on the bottom of the base, and a third conductive layer (including conductive parts) formed on the top of the base. Here, the first and second circuit substrates are bonded by pressure so that the first and second conductive parts are laminated and embedded together into the insulating layer.Type: ApplicationFiled: August 13, 2010Publication date: December 2, 2010Applicant: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Hideki Mizuhara, Takaya Kusabe, Sadamichi Takakusaki
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Patent number: 7714232Abstract: Provided are a hybrid integrated circuit device in which fine patterns can be formed while current-carrying capacitances are ensured, and a method of manufacturing the same. The hybrid integrated circuit device of the present invention includes conductive patterns formed on a front surface of a circuit substrate and circuit elements electrically connected respectively to the conductive patterns. The conductive patterns include a first conductive pattern and a second conductive pattern formed more thickly than the first conductive pattern. The second conductive pattern includes a protruding portion protruding in a thickness direction thereof.Type: GrantFiled: February 18, 2005Date of Patent: May 11, 2010Assignee: Sanyo Electric Co., Ltd.Inventors: Yusuke Igarashi, Sadamichi Takakusaki, Motoichi Nezu, Takaya Kusabe
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Publication number: 20090090928Abstract: Provided are: a light emitting module capable of ensuring a high heat-dissipating property and mountable in any of sets in various shapes; and a method for manufacturing the light emitting module. The light emitting module mainly includes: a metal substrate; an insulating layer covering the upper surface of the metal substrate; a conductive pattern formed on the upper surface of the insulating layer; and a light emitting element fixedly attached to the upper surface of the metal substrate and electrically connected to the conductive pattern. Furthermore, a groove is formed in the metal substrate, and then the metal substrate is bent. Thus, a bent portion is formed in the metal substrate.Type: ApplicationFiled: September 25, 2008Publication date: April 9, 2009Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd., SANYO Consumer Electronics Co., Ltd.Inventors: Haruhiko MORI, Takaya Kusabe, Tatsuya Motoike
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Publication number: 20080123299Abstract: A circuit device exhibiting excellent heat radiation properties and a manufacturing method thereof are hereby provided. A circuit device comprises a circuit board, an insulating layer formed on the circuit board, a conductive pattern formed on the insulating layer, a circuit element electrically connected to the conductive pattern, wherein a protrusion partially extending and being buried in the insulating layer is provided on the circuit board. Accordingly, heat generated inside the device can be efficiently discharged to the exterior via the protrusion.Type: ApplicationFiled: March 24, 2005Publication date: May 29, 2008Inventors: Sadamichi Takakusaki, Yusuke Igarashi, Motoichi Nezu, Takaya Kusabe
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Publication number: 20080106875Abstract: Provided are a hybrid integrated circuit device in which fine patterns can be formed while current-carrying capacitances are ensured, and a method of manufacturing the same. The hybrid integrated circuit device of the present invention includes conductive patterns formed on a front surface of a circuit substrate and circuit elements electrically connected respectively to the conductive patterns. The conductive patterns include a first conductive pattern and a second conductive pattern formed more thickly than the first conductive pattern. The second conductive pattern includes a protruding portion protruding in a thickness direction thereof.Type: ApplicationFiled: February 18, 2005Publication date: May 8, 2008Inventors: Yusuke Igarashi, Sadamichi Takakusaki, Motoichi Nezu, Takaya Kusabe
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Publication number: 20080023841Abstract: To reduce connection defects between a circuit substrate provided on a core substrate and a circuit to be mounted thereon, thereby improving reliability as a multilayered device mounting substrate. The device mounting substrate includes: a first circuit substrate composed of a substrate, an insulating layer formed on this substrate, and a first conductive layer (including conductive parts) formed on this insulating layer; and a second circuit substrate mounted on the first circuit substrate, being composed of a base, a second conductive layer (including conductive parts) formed on the bottom of the base, and a third conductive layer (including conductive parts) formed on the top of the base. Here, the first and second circuit substrates are bonded by pressure so that the first and second conductive parts are laminated and embedded together into the insulating layer.Type: ApplicationFiled: July 30, 2007Publication date: January 31, 2008Applicant: SANYO ELECTRIC CO., LTD.Inventors: Mayumi Nakasato, Hideki Mizuhara, Takaya Kusabe, Sadamichi Takakusaki
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Patent number: 7163841Abstract: To provide a method of manufacturing a highly reliable circuit device realizing a smaller, thinner and lighter configuration. In the method of manufacturing a circuit device according to the invention, a resin sealed body is separated from a supporting substrate, after the resin sealed body containing a circuit device is formed on a top surface of the supporting substrate. Therefore, manufacture of a circuit device having no substrate becomes possible and it realizes a thinner and lighter circuit device with improved heat dissipation. Moreover, since sealing with a sealing resin can be performed on the supporting substrate, warps, caused by the differences in thermal expansion coefficients between the sealing resin and conductive patterns and between the sealing resin and circuit components, can be prevented.Type: GrantFiled: July 11, 2005Date of Patent: January 16, 2007Assignee: Sanyo Electric Co., Ltd.Inventors: Sadamichi Takakusaki, Yusuke Igarashi, Motoichi Nezu, Takaya Kusabe
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Publication number: 20060024862Abstract: To provide a method of manufacturing a highly reliable circuit device realizing a smaller, thinner and lighter configuration. In the method of manufacturing a circuit device according to the invention, a resin sealed body is separated from a supporting substrate, after the resin sealed body containing a circuit device is formed on a top surface of the supporting substrate. Therefore, manufacture of a circuit device having no substrate becomes possible and it realizes a thinner and lighter circuit device with improved heat dissipation. Moreover, since sealing with a sealing resin can be performed on the supporting substrate, warps, caused by the differences in thermal expansion coefficients between the sealing resin and conductive patterns and between the sealing resin and circuit components, can be prevented.Type: ApplicationFiled: July 11, 2005Publication date: February 2, 2006Inventors: Sadamichi Takakusaki, Yusuke Igarashi, Motoichi Nezu, Takaya Kusabe
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Publication number: 20050263482Abstract: In a method of manufacturing a circuit device of the present invention, protruding portions protruding upward are formed in part of a conductive pattern formed on the front surface of a circuit substrate. Next, the front surface of the circuit substrate including the protruding portions is coated with coating resin. Subsequently, the coating resin is etched so that the top surfaces of the protruding portions are exposed. Then, the fixation and electrical connection of circuit elements are performed. Finally, an electric circuit formed on the front surface is sealed, whereby a hybrid integrated circuit device is completed.Type: ApplicationFiled: May 27, 2005Publication date: December 1, 2005Inventors: Sadamichi Takakusaki, Motoichi Nezu, Takaya Kusabe