Abstract: A high-rigid type guiding device for guiding a steel material to be rolled comprises guide rollers toughened by satisfying the condition in which rigidity (K) at contact portions with the steel material is defined by:K=Fmax/Smaxwherein, Fmax represents the maximum load exerted on the guide rollers (Fmax=m.times.FT, 1.0.ltoreq.m.ltoreq.2.0), and Smax represents the maximum allowable value within a range in which increment S of a roller gap defined between the contact portions is determined (Smax=n.times..delta.1, 0.2.ltoreq.n.ltoreq.0.8). Consequently, the efficiency of rolling and the productivity of the rolled steel products can be improved, and the yielding efficiency and quality of the products can be heightened.

Abstract: A four-roller type sizing mill apparatus for forming round steel rods, comprises two four-roller mills each having two pair of facing rollers. One pair of facing rollers is arranged in rolling direction perpendicular to the rolling direction of the other pair of rollers. The two four-roller mills are arranged in line, with the rolling direction of one of the two four-roller mills being shifted by 45.degree. from the rolling direction of the other four-roller mill. The two pair of rollers of a first four-roller mill positioned closer to the rolling material inlet are separated from each other by a distance which is greater than zero and not greater than five times the projected contact length of one of the pair of rollers positioned closer to the rolling material inlet.

Abstract: This invention relates to a thin film semiconductor device and a method for fabricating it, and more particularly a thin film semiconductor device suitably applicable to a display device in an active matrix system and a method for fabricating it. In this invention, the structure of a thin film semiconductor device for improving the characteristic thereof and particularly the structure relative to the dominant orientation of a poly-Si film as an active layer of a thin film transistor (TFT) is disclosed. A method for fabricating a thin film semiconductor device which is capable of forming a poly-Si film at a relatively low process temperature is disclosed. Further, a display device in an active matrix system which provided high performance and high image quality is disclosed. The poly-Si film having a dominant orientation of (111) is formed by forming a poly-Si film on the semiconductor substrate at a temperature up to 570.degree. C. and annealing the substrate at a temperature up to 640.degree. C.

Abstract: A semiconductor device has an active layer in which a semiconductor element is formed by employing a silicon single crystal as a substrate. The present invention causes a tensile strain to remain in the active layer, thereby to improve the carrier mobility.

Abstract: A thin film transistor formed on an insulating sulstrate is disclosed in which metal silicide layers are formed in a thin film made of a monocrystalline, polycrystalline, or amorphous semiconductor material, to be used as source and drain regions, and further a gate electrode includes a metal silicide layer.

Abstract: A thin film transistor and a method of fabricating the transistor are disclosed. The gate electrode of this thin film transistor is made small in thickness so that active hydrogen for hydrogenating passivation can penetrate in a surface layer of channel region having substantially uniform thickness, through the gate electrode. Thus, hydrogenation can be effectively carried out for the thin film transistor, independently of the length of a channel formed in the transistor.

Abstract: Complementary thin fillm transistors (C-TFT) formed on an insulating substrate, comprising a pair of highly resistive n-type silicon islands, a pair of heavily doped n-type regions formed in one of the islands to form source and drain regions of n-channel TFT, a pair of contacts formed on the surface of the other island and establishing a high potential barrier when the underlying region is of n-type and a low potential barrier when the underlying region is inverted to be of p-type. The process for manufacturing complementary TFTs can be simplified significantly.

Abstract: This invention relates to the structure of a field effect transistor, which is suitable for liquid crystal display of an active matrix scheme and there is disclosed a new structure for the field effect transistor, in which at least one of the source region and the drain region is of multi-layered structure, in which high impurity concentration portions and low impurity concentration portions are alternately superposed on each other.

Abstract: The vapor phase growth on semiconductor wafers is carried out by an apparatus in which a multiplicity of semiconductor wafers are held by a holder so that the semiconductor wafers lie one over another in a vertical direction, and are rotated together with the holder, the holder is placed in a heater disposed in a reaction vessel, a raw material gas supply nozzle and a raw material gas exhaust nozzle are provided within the heater so that the semiconductor wafers are interposed between the gas supply nozzle and the gas discharge nozzle, and the gas supply nozzle and the gas discharge nozzle have gas supply holes and gas discharge holes, respectively, so that a raw material gas can flow on each semiconductor wafer in horizontal directions. When the temperature of the heater is raised by a heating source to heat the semiconductor wafers, the raw material gas is supplied from the gas supply holes to each semiconductor wafer, and thus a uniform layer is grown on each semiconductor wafer from the raw material gas.

Abstract: This invention relates to improvements in the SOS technology including the so-called laser annealing processing. According to this invention, a semiconductor layer of an SOS structure consists of the three layers of an interface layer made up of twins, a seed crystalline layer and a re-grown layer far thicker than the preceding two layers when viewed from the side of an insulating substrate. The re-grown layer is formed in such a way that a semiconductor layer deposited on the insulating substrate is irradiated with an electromagnetic wave, for example, pulsed ruby laser beam, which is absorbed substantially uniformly by a portion except the interface layer and the seed crystalline layer. According to this invention, the quality of the re-grown layer is improved, and the mobility of carriers is enhanced. As a result, the operating speed of a semiconductor device employing the SOS structure is raised, and the leakage current is reduced.

Abstract: Disclosed is a method of forming a large number of monocrystalline silicon regions, of uniform orientation, on the surface of an insulator material. Initially, a large number of island regions of amorphous or polycrystalline silicon, thermally connected to one another in a predetermined direction by connecting regions, are provided. Then such island regions are sequentially melted and regrown in such predetermined direction so as to form the monocrystalline semiconductor regions, with such regions having a uniform orientation. Thereafter, such connecting regions can be removed in order to isolate the island regions. The connecting regions can be formed with gaps, whereby such connecting regions need not be removed. The connecting regions can be formed of materials having a higher heat conductivity than that of the material of the island regions, and/or the connecting regions can have a smaller cross-sectional area at right angles to the predetermined direction than that of the island regions.

Abstract: A method of manufacturing a solar battery by serially connecting a plurality of solar battery elements arranged spaced from each other. A pair of flexible films are used to sandwich the arrangement of the solar battery elements, and each of the flexible films has a plurality of conductive members formed thereon at positions respectively corresponding to the solar battery elements. However, each conductive member has one end portion extended beyond the surface of the corresponding solar battery element in the direction of the alignment of the solar battery elements. Thus, when the pair of flexible films are disposed to sandwich the solar battery elements, the extended end portion of the conductive member on the side of the light receiving surface of one solar battery element is positioned in the space between adjacent solar battery elements opposite the end portion of the conductive member on the side of the back surface of the next solar battery element.

Abstract: This invention provides a thermal fatigue resistant, low-melting point solder alloy consisting of 13 to 20% by weight Bi, 42 to 50% by weight, Pb, the balance being Sn. This solder alloy is suited for lap joints of electronic parts into or onto a printed substrate or a hybrid substrate.

Abstract: A method of forming by CVD technique a layer of material with good uniformity and reproducibility on the surfaces of a plurality of substrates supported within the reaction chamber. The feature of the invention is that a gaseous mixture containing a reaction gas is supplied into the reaction chamber from the inlet of the reaction chamber and the auxiliary gas nozzle provided between the inlet and the exhaust in a predetermined control manner. Moreover, part of the gaseous mixture within the reaction chamber is sampled from the gas flow for the measurement of the concentration of the reaction gas, and from the measured results is determined the rate of gas supply from the auxiliary gas nozzle.

Abstract: Disclosed is a temperature-compensated voltage reference diode comprising a breakdown PN junction for establishing the zener breakdown voltage, a PN junction for temperature compensation having a temperature coefficient opposite to that of the breakdown PN junction, the breakdown PN junction and the temperature-compensating PN junction being integrally formed in a semiconductor substrate in a laminated fashion with these PN junctions connected in inverse series with each other, and a semiconductor region interposed between the breakdown PN junction and the temperature compensating PN junction for substantially preventing a transistor action from taking place between the respective PN junctions, wherein the semiconductor region is formed of at least one of a polycrystalline semiconductor layer and a single crystal semiconductor layer having an impurity concentration of higher than about 5.times.10.sup.18 atoms/cm.sup.3.

Abstract: A dielectric insulator separated substrate comprises a plurality of monocrystalline semiconductor island regions in which circuit elements are to be formed and a support region for supporting the island regions while a dielectric film formed on the supporting region electrically separates the island regions from each other. The supporting region comprises crystalline semiconductor layers and at least one oxygen diffusion preventive film laminated alternately.The extreme outer polycrystalline semiconductor layer of the supporting region is polished to such a thickness as to prevent the substrate from being curved greatly by the wedge action due to the oxygen diffusion. Since the extreme outer polycrystalline semiconductor layer thus polished has a flat surface, the handling of the substrate is easy. The substrate devoid of any curveness deformation assures a highly accurate formation of the circuit elements in the island regions.

Abstract: A semiconductor substrate having a single crystal semiconductor layer of one conductivity type exposed to the surface thereof is maintained at a temperature lower than the temperature at which the semiconductors is precipitated from the gas phase. In this state, a gas of a starting material of a semiconductor, a gas containing impurities capable of forming a semiconductor of the other conductivity type and a carrier gas therefore are fed onto the semiconductor substrate. Then, the semiconductor substrate is heated to form an amorphous or polycrystalline semiconductor layer of the other conductivity type on the semiconductor substrate.

Abstract: In a method of doping impurities comprising mixing a carrier gas, a semiconductor compound gas and a doping gas and leading the mixed gas to a reaction chamber to form a semiconductor layer or a semiconductor oxide layer doped with impurities on a substrate inside the chamber, a part of the doping gas before mixing the doping gas with the other gases is taken and led to a gas analyzer and impurity concentration in the doping gas is monitored to control the impurity concentration in the doping gas.