Abstract: According to one embodiment, a method of manufacturing a semiconductor device, includes forming a first insulating layer, an oxide semiconductor layer, a second insulating layer, a buffer layer and a metal layer sequentially on a base, forming a patterned resist on the metal layer, etching the buffer layer and the metal layer using the resist as a mask to expose an upper surface of the second insulating layer, reducing a volume of the resist to expose an upper surface along a side surface of the metal layer, etching the metal layer using the resist as a mask, to form a gate electrode and to expose an upper surface of the buffer layer, and carrying out ion implantation on the oxide semiconductor layer using the gate electrode as a mask.

Abstract: A display device includes a plurality of pixel electrodes each connected to a semiconductor device, a plurality of common electrodes each disposed opposite to a part of the plurality of pixel electrodes, and a plurality of common wirings each connected to the plurality of common electrodes. The semiconductor device includes an oxide semiconductor layer having a polycrystalline structure, and at least a part of each common wiring is composed of the oxide semiconductor layer. Each common electrode may be located across a plurality of pixel electrodes.

Abstract: A semiconductor device comprises a first insulating layer; an oxide semiconductor layer having a polycrystalline structure on the first insulating layer; a gate insulating layer on the semiconductor oxide layer; a buffer layer on the gate insulating layer; a gate wiring on the buffer layer; and a second insulating layer on the gate wiring. The oxide semiconductor layer has a first region, a second region and a third region aligned toward a first direction. An electrical resistivity of the second region is higher than an electrical resistivity of the first region and lower than an electrical resistivity of the third region. A sheet resistance of the third region is less than 1000 ohm/square.

Abstract: A radiation detector according to an embodiment of the present invention includes: a transistor in which an oxide semiconductor layer is used in a channel of the transistor; a photoelectric converting layer connected to the transistor; a wavelength converting layer facing the photoelectric converting layer and capable of emitting visible light based on radioactive rays absorbed by the wavelength converting layer; and an oxide layer in contact with the oxide semiconductor layer between the transistor and the photoelectric converting layer, wherein a thickness of the oxide layer is 50 nm or less.

Abstract: A semiconductor device includes a light shielding layer, a first silicon nitride insulating layer in contact with the light shielding layer with a first interface, a first silicon oxide insulating layer in contact with the first silicon nitride layer with a second interface, and an oxide semiconductor layer over the first silicon oxide insulating layer. The first silicon oxide insulating layer is in contact with the second silicon oxide insulating layer. A thickness t of the first silicon nitride layer satisfies a condition in which light reflected at the first interface and light reflected at the second interface weaken each other when light having a wavelength of 450 nm is incident on the first silicon nitride insulating layer at an angle of 60 degrees from a normal direction of the second interface.

Abstract: A semiconductor device includes a metal oxide layer containing aluminum as a main component above an insulating surface, an oxide semiconductor layer on the metal oxide layer; a gate electrode facing the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode, wherein a water contact angle on an upper surface of the metal oxide layer is 20° or lower.

Abstract: A thin film transistor includes an oxide semiconductor layer having a polycrystalline structure over a substrate, a gate electrode over the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes a first region having a first carrier concentration and overlapping the gate electrode, a second region having a second carrier concentration and not overlapping the gate electrode, and a third region between the first region and the second region and overlapping the gate electrode. The second carrier concentration is larger than the first carrier concentration. A carrier concentration of the third region decreases from the second region to the first region in a channel length direction. A length of the third region is greater than or equal to 0.00 ?m and less than or equal to 0.60 ?m in the channel length direction.

Abstract: A display device having a plurality of pixels arranged in a matrix along a first direction and a second direction intersecting the first direction, each of the plurality of pixels includes, a transistor including an oxide semiconductor layer, a gate wiring extending in the first direction opposite the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate wiring, a first conductive layer provided on at least one first insulating layer above the transistor and in contact with the oxide semiconductor layer, a second insulating layer provided on the first conductive layer, a first inorganic layer provided on the second insulating layer and having openings therein, and a second inorganic layer provided on the first inorganic layer and in contact with the second insulating layer in the opening.

Abstract: A semiconductor device includes a metal oxide layer containing aluminum over an insulating surface and an oxide semiconductor layer over the metal oxide layer. The oxide semiconductor layer includes a first crystal region in contact with the metal oxide layer and a second crystal region in contact with the first crystal region and having a larger area than the first crystal region in a cross-sectional view of the oxide semiconductor layer. The first crystal region and the second crystal region differ from each other in at least one of a crystal structure and a crystal orientation.

Abstract: A method for manufacturing a semiconductor device comprises steps of: forming an oxide semiconductor layer on a substrate by a sputtering method; performing a first heat treatment on the oxide semiconductor layer after placing the substrate on which the oxide semiconductor layer is formed in a heating furnace having a heating medium maintained at a preset temperature; forming a gate insulating layer on the oxide semiconductor layer after the first heat treatment; and forming a gate electrode on the gate insulating layer. When the substrate is installed in the heating furnace, a temperature drop of the heating medium is kept within 15% of the set temperature.

Abstract: A semiconductor device includes a substrate, an insulating layer over the substrate, a metal oxide layer over the insulating layer, and an oxide semiconductor layer over the metal oxide layer. The insulating layer includes a first region overlapping the metal oxide layer and a second region not overlapping the metal oxide layer. A hydrogen concentration of the first region is greater than a hydrogen concentration of the second region. A nitrogen concentration of the first region is greater than a nitrogen concentration of the second region.

Abstract: A semiconductor device includes a metal oxide layer over an insulating surface and an oxide semiconductor layer over the metal oxide layer. A fluorine concentration of the metal oxide semiconductor layer is greater than or equal to 1×1018 atoms/cm3. In a SIMS analysis, a secondary ion intensity of fluorine detected in the metal oxide layer may be greater than or equal to 10 times a secondary ion intensity of fluorine detected in the oxide semiconductor layer.

Abstract: A semiconductor device according to an embodiment includes: a metal oxide layer above a substrate, the metal oxide layer containing aluminum as a main component; an oxide semiconductor layer above the metal oxide layer; a gate electrode facing the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode, wherein the oxide semiconductor layer includes two or more metals including indium, and a ratio of indium in the two or more metals is 50% or more.

Abstract: A semiconductor device comprises a first insulating layer, an oxide semiconductor layer having a polycrystalline structure on the first insulating layer, a gate insulating layer on the oxide semiconductor layer, a gate wiring on the gate insulating layer, and a second insulating layer on the gate wiring. The oxide semiconductor layer has a first region, a second region and a third region aligned toward a first direction. The first region overlaps the gate insulating layer and the gate wiring. The third region is in contact with the second insulating layer. A distance from a top surface of the second region to a top surface of the second insulating layer is longer than a distance from a top surface of the third region to the top surface of the second insulating layer.

Abstract: A semiconductor device according to an embodiment includes an oxide semiconductor layer provided above an insulating surface, a gate insulating layer provided above the oxide semiconductor layer, and a gate electrode provided above the oxide semiconductor layer via the gate insulating layer, wherein the gate electrode has a titanium-containing layer and a conductive layer in order from the gate insulating layer side, the gate insulating layer includes a first region overlapping the gate electrode and a second region not overlapping the gate electrode, and a thickness of the titanium-containing layer is 50% or less than a thickness of the gate insulating layer in the first region.

Abstract: A semiconductor device includes a metal oxide layer over an insulating surface, an oxide semiconductor layer over the metal oxide layer, and an insulating layer over the oxide semiconductor. The insulating layer includes a first region overlapping the oxide semiconductor layer. A first aluminum concentration of the first region is greater than or equal to 1×1017 atoms/cm3.

Abstract: An oxide semiconductor film having crystallinity over a substrate contains indium (In) and a first metal element (M1). The oxide semiconductor film includes a plurality of crystal grains. Each of the plurality of crystal grains includes at least one of a crystal orientation <001>, a crystal orientation <101>, and a crystal orientation <111> obtained by an electron backscatter diffraction (EBSD) method. In occupancy rates of crystal orientations calculated based on measurement points having crystal orientations with a crystal orientation difference greater than or equal to 0 degrees and less than or equal to 15 degrees with respect to a normal direction of a surface of the substrate, an occupancy rate of the crystal orientation <111> is greater than an occupancy rate of the crystal orientation <001> and an occupancy rate of the crystal orientation <101>.

Abstract: A thin film transistor includes a metal oxide layer over the substrate, an oxide semiconductor layer having crystallinity in contact with the metal oxide layer, a gate electrode overlapping the oxide semiconductor layer, and an insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes a plurality of crystal grains. Each of the plurality of crystal grains includes at least one of a crystal orientation <001>, a crystal orientation <101>, and a crystal orientation <111> obtained by an EBSD method. In occupancy rates of crystal orientations calculated based on measurement points having crystal orientations with a crystal orientation difference greater than or equal to 0 degrees and less than or equal to 15 degrees with respect to a normal direction of a surface of the substrate, an occupancy rate of the crystal orientation <001> is less than or equal to 5%.

Abstract: A method for manufacturing a semiconductor device, the method comprising steps of: forming a first metal oxide layer containing aluminium as a main component above an insulating surface; performing a planarization process on a surface of the first metal oxide layer; forming an oxide semiconductor layer on the insulating surface on which the planarization process is performed; forming a gate insulating layer above the oxide semiconductor layer; and forming a gate electrode facing the oxide semiconductor layer above the gate insulating layer.

Abstract: A thin film transistor includes an oxide semiconductor layer having crystallinity over a substrate, a gate electrode overlapping the oxide semiconductor layer, and an insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes a plurality of crystal grains. Each of the plurality of crystal grains includes at least one of a crystal orientation <001>, a crystal orientation <101>, and a crystal orientation <111> obtained by an EBSD method. In occupancy rates of crystal orientations calculated based on measurement points having crystal orientations with a crystal orientation difference greater than or equal to 0 degrees and less than or equal to 15 degrees with respect to a normal direction of a surface of the substrate, an occupancy rate of the crystal orientation <111> is greater than an occupancy rate of the crystal orientation <001> and an occupancy rate of the crystal orientation <101>.