Patents by Inventor Takayasu Kito

Takayasu Kito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250106536
    Abstract: An image sensor includes: a pixel array in which pixels are arranged in a matrix; impedance converter circuits for each column, each of which receives a pixel signal from at least one pixel; and an AD converter for each column that converts from analog to digital signals output from the impedance converter circuits. The pixel array includes, for each column, N pixel groups each including K or more pixels consecutively arranged in a column direction. Each of the N pixel groups includes a vertical signal line connected to L or more pixels among the K or more pixels. In each column, each of the N vertical signal lines of the N pixel groups is connected to the input of one of the impedance converter circuits, and the output of each of the impedance converter circuits is connected to the AD converter.
    Type: Application
    Filed: December 11, 2024
    Publication date: March 27, 2025
    Inventors: Takayasu KITO, Yutaka ABE, Makoto IKUMA
  • Publication number: 20250016467
    Abstract: A solid-state imaging device includes a pixel circuit that outputs a plurality of pixel signals, a detection circuit, and a signal processor. The pixel circuit includes a photodiode, a transfer transistor that reads out a signal of the photodiode to a charge storage, and a storage capacitance that stores a charge overflowing from the photodiode. The detection circuit compares a signal of the storage capacitance with a reference signal and, when the signal of the storage capacitance has reached the reference signal, initializes the photodiode and the storage capacitance and counts an initialization count. The signal processor calculates a first signal that indicates intensity of incident light, in accordance with the initialization count and a mixed signal of the signal of the storage capacitance and the signal of the photodiode that has been read out to the charge storage by the transfer transistor.
    Type: Application
    Filed: September 19, 2024
    Publication date: January 9, 2025
    Inventors: Makoto IKUMA, Yutaka ABE, Takayasu KITO, Norihiko SUMITANI, Kenji WATANABE
  • Publication number: 20250016473
    Abstract: A solid-state image capturing device includes a pixel which includes: a first photoelectric converter; a floating diffusion; a first charge accumulator including one electrode and an other electrode; a first transfer transistor including a source and a drain, one of which is connected to the first photoelectric converter and an other of which is connected to the floating diffusion; a second transfer transistor including a source and a drain, one of which is connected to the one electrode; a reset transistor including a source and a drain, one of which is connected to the other of the source and the drain of the second transfer transistor and an other of which is connected to a power supply line; and a switching transistor including a source and a drain, one of which is connected to the other electrode, and an other of which is connected to the power supply line.
    Type: Application
    Filed: September 17, 2024
    Publication date: January 9, 2025
    Inventors: Masahiro HIGUCHI, Yutaka ABE, Takayasu KITO
  • Publication number: 20240163579
    Abstract: A solid-state imaging device includes: a plurality of pixel circuits arranged in rows and columns; a plurality of selector circuits that each receive, as inputs, two pixel signals corresponding to two columns different from each other; k column AD conversion circuits that perform AD conversion on pixel signals output from the plurality of selector circuits, k being an integer greater than or equal to two; and m column AD conversion circuits that are provided redundantly. In the solid-state imaging device, the plurality of selector circuits selectively exclude, from among the k column AD conversion circuits and the m column AD conversion circuits, m column AD conversion circuits corresponding to m columns adjacent to each other, and associate k pixel signals output from the plurality of pixel circuits with k column AD conversion circuits which have not been excluded.
    Type: Application
    Filed: December 1, 2023
    Publication date: May 16, 2024
    Inventors: Norihiko SUMITANI, Hiroshi FUJINAKA, Yutaka ABE, Takayasu KITO
  • Publication number: 20240121533
    Abstract: A solid-state imaging apparatus includes a pixel circuit, a detection and selection circuit, and an AD conversion circuit. The pixel circuit outputs a plurality of pixel signals corresponding to mutually different gains or sensitivities. The detection and selection circuit compares one or more of the plurality of pixel signals with a reference value to generate a signal selection signal that instructs selection of a pixel signal among the plurality of pixel signals. The detection and selection circuit includes a sample and hold circuit that holds the plurality of pixel signals, and selects at least one pixel signal among the plurality of pixel signals held in the sample and hold circuit based on the signal selection signal. The detection and selection circuit is arranged in a stage before the AD conversion circuit that AD converts the at least one pixel signal selected.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 11, 2024
    Inventors: Makoto IKUMA, Yutaka ABE, Takayasu KITO
  • Publication number: 20240121528
    Abstract: A solid-state imaging device includes a plurality of pixel circuits arranged in rows and columns; and a relief unit which includes N signal lines and n pixel circuits among the plurality of pixel circuits, N being an integer greater than or equal to 3, n being an integer less than or equal to N. Each of the n pixel circuits is connected to a group of at least two signal lines out of the N signal lines, and selectively outputs a pixel signal to one of the at least two signal lines included in the group; and n groups corresponding to the n pixel circuits have mutually different combinations of signal lines, the n groups each being the group.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Takayasu KITO, Norihiko SUMITANI
  • Patent number: 10847556
    Abstract: A solid-state imaging apparatus includes a plurality of high-sensitivity pixels that are arranged in a matrix, and perform a photoelectric conversion at a predetermined sensitivity; a plurality of low-sensitivity pixels that are arranged in a matrix in gaps between the plurality of high-sensitivity pixels, and perform a photoelectric conversion at a lower sensitivity than the predetermined sensitivity; and a signal processor that generates a pixel signal by (i) detecting a difference signal between a signal from the plurality of high-sensitivity pixels and a signal from the plurality of low-sensitivity pixels, and (ii) correcting the signal from the plurality of high-sensitivity pixels using the difference signal.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: November 24, 2020
    Assignee: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
    Inventors: Makoto Ikuma, Hiroyuki Amikawa, Takayasu Kito, Shinichi Ogita, Junichi Matsuo, Yasuyuki Endoh, Katsumi Tokuyama, Tetsuya Abe
  • Patent number: 10785430
    Abstract: A solid-state imaging device includes: a pixel including a photoelectric converter that generates a charge and a charge accumulator that converts the charge into a voltage; a controller that causes the pixel to perform exposure in a first exposure mode and convert the charge into the voltage with a first gain to output a first pixel signal, and causes the pixel to perform exposure in a second exposure mode and convert the charge into the voltage with a second gain to output a second pixel signal, the second exposure mode being shorter in exposure time than the first exposure mode, and the second gain being lower than the first gain; and a signal processor that synthesizes the second pixel signal after amplification and the first pixel signal.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: September 22, 2020
    Assignee: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
    Inventors: Makoto Ikuma, Takahiro Muroshima, Takayasu Kito, Hiroyuki Amikawa, Tetsuya Abe
  • Patent number: 10742906
    Abstract: A solid-state imaging device includes: a pixel array unit in which a plurality of pixels are arranged in rows and columns; a plurality of column signal lines which are provided in one-to-one correspondence with pixel columns; a column processor including a plurality of column AD circuits provided in one-to-one correspondence with the plurality of column signal lines; a power supply variation detector which is connected to a power supply wire through which a power supply voltage is transmitted to each of the pixels, and which detects, in correspondence with pixel rows, power supply variation components attributed to variations in the power supply voltage; and a power supply variation corrector which corrects, for each of the pixel rows, a pixel signal detected by the column processor, using the power supply variation components detected by the power supply variation detector.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: August 11, 2020
    Assignee: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
    Inventors: Makoto Ikuma, Takahiro Muroshima, Takayasu Kito, Hiroyuki Amikawa, Tetsuya Abe
  • Patent number: 10685997
    Abstract: A solid-state imaging apparatus includes a pixel array, a column processor, and a test signal generating circuit that generates a first digital signal for testing purposes. The test signal generating circuit generates the first digital signal within one horizontal scanning period. The column processor converts a first analog signal, that is converted from the first digital signal, to a second digital signal within the one horizontal scanning period.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: June 16, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Makoto Ikuma, Hiroyuki Amikawa, Takayasu Kito, Shinichi Ogita, Junichi Matsuo, Yasuyuki Endoh, Katsumi Tokuyama, Tetsuya Abe
  • Patent number: 10440302
    Abstract: An imaging device having a pixel including a photoelectric converter that converts incident light into charges, and a reset transistor having a first source, a first drain and a first gate, one of the first source and the first drain coupled to the photoelectric converter. The imaging device further including first voltage generating circuity that generates a first voltage; second voltage generating circuity that generates a second voltage, the second voltage generating circuity being different from the first voltage generating circuity; and first switching circuity that causes either the first voltage generating circuity or the second voltage generating circuity to selectively couple to the other of the first source and the first drain of the reset transistor.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: October 8, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Masaaki Yanagida, Takayasu Kito, Yoshiaki Satou
  • Publication number: 20190289238
    Abstract: A solid-state imaging apparatus includes a pixel array, a column processor, and a test signal generating circuit that generates a first digital signal for testing purposes. The test signal generating circuit generates the first digital signal within one horizontal scanning period. The column processor converts a first analog signal, that is converted from the first digital signal, to a second digital signal within the one horizontal scanning period.
    Type: Application
    Filed: June 4, 2019
    Publication date: September 19, 2019
    Inventors: Makoto IKUMA, Hiroyuki Amikawa, Takayasu Kito, Shinichi Ogita, Junichi Matsuo, Yasuyuki Endoh, Katsumi Tokuyama, Tetsuya Abe
  • Publication number: 20190288020
    Abstract: A solid-state imaging apparatus includes a plurality of high-sensitivity pixels that are arranged in a matrix, and perform a photoelectric conversion at a predetermined sensitivity; a plurality of low-sensitivity pixels that are arranged in a matrix in gaps between the plurality of high-sensitivity pixels, and perform a photoelectric conversion at a lower sensitivity than the predetermined sensitivity; and a signal processor that generates a pixel signal by (i) detecting a difference signal between a signal from the plurality of high-sensitivity pixels and a signal from the plurality of low-sensitivity pixels, and (ii) correcting the signal from the plurality of high-sensitivity pixels using the difference signal.
    Type: Application
    Filed: June 4, 2019
    Publication date: September 19, 2019
    Inventors: Makoto IKUMA, Hiroyuki AMIKAWA, Takayasu KITO, Shinichi OGITA, Junichi MATSUO, Yasuyuki ENDOH, Katsumi TOKUYAMA, Tetsuya ABE
  • Publication number: 20180376083
    Abstract: A solid-state imaging device includes: a pixel including a photoelectric converter that generates a charge and a charge accumulator that converts the charge into a voltage; a controller that causes the pixel to perform exposure in a first exposure mode and convert the charge into the voltage with a first gain to output a first pixel signal, and causes the pixel to perform exposure in a second exposure mode and convert the charge into the voltage with a second gain to output a second pixel signal, the second exposure mode being shorter in exposure time than the first exposure mode, and the second gain being lower than the first gain; and a signal processor that synthesizes the second pixel signal after amplification and the first pixel signal.
    Type: Application
    Filed: August 9, 2018
    Publication date: December 27, 2018
    Inventors: Makoto IKUMA, Takahiro MUROSHIMA, Takayasu KITO, Hiroyuki AMIKAWA, Tetsuya ABE
  • Publication number: 20180376081
    Abstract: A solid-state imaging device includes: a pixel array unit in which a plurality of pixels are arranged in rows and columns; a plurality of column signal lines which are provided in one-to-one correspondence with pixel columns; a column processor including a plurality of column AD circuits provided in one-to-one correspondence with the plurality of column signal lines; a power supply variation detector which is connected to a power supply wire through which a power supply voltage is transmitted to each of the pixels, and which detects, in correspondence with pixel rows, power supply variation components attributed to variations in the power supply voltage; and a power supply variation corrector which corrects, for each of the pixel rows, a pixel signal detected by the column processor, using the power supply variation components detected by the power supply variation detector.
    Type: Application
    Filed: August 9, 2018
    Publication date: December 27, 2018
    Inventors: Makoto IKUMA, Takahiro MUROSHIMA, Takayasu KITO, Hiroyuki AMIKAWA, Tetsuya ABE
  • Publication number: 20180359439
    Abstract: An imaging device having a pixel including a photoelectric converter that converts incident light into charges, and a reset transistor having a first source, a first drain and a first gate, one of the first source and the first drain coupled to the photoelectric converter. The imaging device further including first voltage generating circuity that generates a first voltage; second voltage generating circuity that generates a second voltage, the second voltage generating circuity being different from the first voltage generating circuity; and first switching circuity that causes either the first voltage generating circuity or the second voltage generating circuity to selectively couple to the other of the first source and the first drain of the reset transistor.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Inventors: Masaaki YANAGIDA, Takayasu KITO, Yoshiaki SATOU
  • Patent number: 10079988
    Abstract: An imaging device comprising: a pixel comprising a photoelectric converter and a reset transistor having a source and a drain one of which is electrically connected to the photoelectric converter; a first voltage generating circuit for generating a first voltage; a second voltage generating circuit for generating a second voltage identical or equivalent to the first voltage; and a first switching circuit having a first input terminal electrically connected to the first voltage generating circuit, a second input terminal electrically connected to the second voltage generating circuit, a first output terminal electrically connected to the other of the source and the drain of the reset transistor. The first switching circuit electrically connects one of the first and second input terminals to the first output terminal selectively in a period when the photoelectric converter is reset. The photoelectric converter is reset by use of the first voltage or the second voltage.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: September 18, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masaaki Yanagida, Takayasu Kito, Yoshiaki Satou
  • Patent number: 9549135
    Abstract: A solid-state imaging device includes: a plurality of unit cells each including at least one light receiving unit and an amplifying transistor which outputs an amplified signal corresponding to an amount of the signal charge photoelectrically converted by the light receiving unit; a plurality of vertical signal lines each for receiving an output signal from the amplifying transistor; a pixel power supply line for supplying a power supply voltage to the amplifying transistor; a plurality of constant current source transistors each connected to a different one of the vertical signal lines; and a bias circuit which controls an amount of current to be supplied to each of the constant current source transistors, based on a variation in the power supply voltage.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: January 17, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takayasu Kito, Hiroyuki Amikawa, Masahiro Higuchi, Kenichi Origasa, Hiroshi Fujinaka
  • Publication number: 20170013221
    Abstract: An imaging device comprising: a pixel comprising a photoelectric converter and a reset transistor having a source and a drain one of which is electrically connected to the photoelectric converter; a first voltage generating circuit for generating a first voltage; a second voltage generating circuit for generating a second voltage identical or equivalent to the first voltage; and a first switching circuit having a first input terminal electrically connected to the first voltage generating circuit, a second input terminal electrically connected to the second voltage generating circuit, a first output terminal electrically connected to the other of the source and the drain of the reset transistor. The first switching circuit electrically connects one of the first and second input terminals to the first output terminal selectively in a period when the photoelectric converter is reset. The photoelectric converter is reset by use of the first voltage or the second voltage.
    Type: Application
    Filed: June 23, 2016
    Publication date: January 12, 2017
    Inventors: MASAAKI YANAGIDA, TAKAYASU KITO, YOSHIAKI SATOU
  • Publication number: 20160014363
    Abstract: A solid-state imaging device includes: a plurality of unit cells each including at least one light receiving unit and an amplifying transistor which outputs an amplified signal corresponding to an amount of the signal charge photoelectrically converted by the light receiving unit; a plurality of vertical signal lines each for receiving an output signal from the amplifying transistor; a pixel power supply line for supplying a power supply voltage to the amplifying transistor; a plurality of constant current source transistors each connected to a different one of the vertical signal lines; and a bias circuit which controls an amount of current to be supplied to each of the constant current source transistors, based on a variation in the power supply voltage.
    Type: Application
    Filed: September 18, 2015
    Publication date: January 14, 2016
    Inventors: Takayasu KITO, Hiroyuki AMIKAWA, Masahiro HIGUCHI, Kenichi ORIGASA, Hiroshi FUJINAKA