Patents by Inventor Takayoshi Dohi

Takayoshi Dohi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060267015
    Abstract: A gate electrode of a thin film transistor is composed by a three layer structure obtained by laminating a titanium nitride layer as an upper layer on an aluminum layer as a base layer and by laminating an unalloyed titanium layer as a lower layer under the base layer. An ion implantation is used as an ion doping into a source region and drain region as an active layer of the thin film transistor. The source region and the drain region are annealed at a low temperature of 350° C. to 450° C. to be activated. A chemical reaction between the base layer and the upper layer and between the base layer and the lower layer can be suppressed. The rise of the resistance value in the gate electrode can be suppressed. The resistance of the gate electrode can be reduced. The fluctuation of the threshold voltage of the thin film transistor can be suppressed.
    Type: Application
    Filed: April 26, 2006
    Publication date: November 30, 2006
    Applicant: Toshiba Matsushita Display Technology Co., Ltd.
    Inventors: Hiroshi Omi, Mamoru Furuta, Shoso Nambu, Takayoshi Dohi, Akihiro Takami, Shuji Manda, Hajime Inoue
  • Patent number: 6686287
    Abstract: In patterning a silicon-containing thin film formed over an insulating substrate by means of vapor-phase chemical etching using a resist pattern formed on the thin film as a mask, a luminescence intensity A of wavelengths in a predetermined wavelength range and a luminescence intensity B at a specific wavelength are detected during the patterning. The luminescence intensity B is divided by the luminescence intensity A to produce a divide signal (B/A). The time of termination of the patterning is determined based on a change of the divide signal.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: February 3, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takayoshi Dohi
  • Patent number: 6372083
    Abstract: In manufacturing a thin-film transistor on a glass substrate, a first thin film consisting of an amorphous silicon thin film is formed on the glass substrate, and a second thin film is formed on the first thin film. Then, this second thin film is etched to form a mask pattern. A dopant ion is doped into the first thin film through the mask pattern to form a source region and a drain region. The process of forming the mask pattern and the process of forming the source and drain regions are carried out continuously without exposing the substrate to the atmosphere.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: April 16, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhisa Oana, Kaichi Fukuda, Takayoshi Dohi
  • Patent number: 6146929
    Abstract: In manufacturing a thin-film transistor on a glass substrate, a first thin film consisting of an amorphous silicon thin film is formed on the glass substrate, and a second thin film is formed on the first thin film. Then, this second thin film is etched to form a mask pattern. A dopant ion is doped into the first thin film through the mask pattern to form a source region and a drain region. The process of forming the mask pattern and the process of forming the source and drain regions are carried out continuously without exposing the substrate to the atmosphere.
    Type: Grant
    Filed: July 9, 1999
    Date of Patent: November 14, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhisa Oana, Kaichi Fukuda, Takayoshi Dohi
  • Patent number: 5888855
    Abstract: The present invention has a semiconductor device including a substrate made of an insulating material, a gate electrode formed on the substrate, a thin film made of a silicon semiconductor and formed on the gate electrode through a gate insulating film, a protective film formed on the thin film and having two opposing major surfaces, and a source electrode and a drain electrode formed to be electrically connected with the thin film, wherein the first major surface of the two major surfaces of the protective film is in contact with the thin film, and a region near the second major surface of the protective film contains oxygen.
    Type: Grant
    Filed: December 14, 1995
    Date of Patent: March 30, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuya Nagahisa, Takaaki Kamimura, Kunio Matumura, Takayoshi Dohi