Patents by Inventor Takayoshi Ino

Takayoshi Ino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050253190
    Abstract: A semiconductor device comprises a semiconductor substrate; a semiconductor layer provided on the surface of the semiconductor substrate; a base layer provided on the surface of the semiconductor layer; a source layer provided on the surface of the base layer; a trench formed to pass through the source layer, the base layer, and the semiconductor layer from the surface of the source layer, and reaching the semiconductor substrate; a gate electrode provided from the source layer to at least the semiconductor layer within the trench; and an insulator provided between the gate electrode and the base layer so as to fill in the inside of the trench below the gate electrode, the insulator insulating the gate electrode from the base layer, and generating a potential distribution from the gate electrode toward the semiconductor substrate when a voltage is applied to the gate electrode.
    Type: Application
    Filed: April 8, 2005
    Publication date: November 17, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideki Okumura, Mitsuhiko Kitagawa, Takuma Hara, Takayoshi Ino, Kiyotaka Arai, Satoshi Taji, Masanobu Tsuchitani
  • Publication number: 20020130359
    Abstract: A semiconductor device comprises a drain region formed on the reverse side of a semiconductor substrate, a base region formed on the drain region and having parts partially exposed at plural positions on a principal plane of the substrate, a source region which has one plane in contact with the base region and the other plane exposed on the principal plane of the substrate, a gate insulating film formed only on a wall of a trench, which is formed in the substrate to reach the drain region, a gate electrode formed so as to be embedded in the trench and a top surface thereof is situated above the junction plane of the source and base regions and at a position lower than the principal plane of the substrate, and an insulating film embedded above the gate electrode in the trench.
    Type: Application
    Filed: March 14, 2002
    Publication date: September 19, 2002
    Inventors: Hideki Okumura, Akihiko Osawa, Takayoshi Ino