Patents by Inventor Takayoshi Nagai

Takayoshi Nagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100147274
    Abstract: There is obtained an ignition apparatus, for an internal combustion engine, that can make a predetermined output current flow in a stable manner so that the combustion state of the internal combustion engine can always be maintained in a good condition, even in the case where the voltage of the power source connected with the energy storing coil fluctuates.
    Type: Application
    Filed: October 1, 2009
    Publication date: June 17, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayoshi NAGAI, Hirohisa Kuwano, Ikuro Suga, Yusuke Naruse
  • Patent number: 7730880
    Abstract: There is obtained an ignition apparatus, for an internal combustion engine, that can make a predetermined output current flow in a stable manner so that the combustion state of the internal combustion engine can always be maintained in a good condition, even in the case where the voltage of the power source connected with the energy storing coil fluctuates.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: June 8, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takayoshi Nagai, Hirohisa Kuwano, Ikuro Suga, Yusuke Naruse
  • Publication number: 20080136977
    Abstract: A projection display uses a light modulating device to modulate, in accordance with image data, light radiated from a light source, project the modulated light onto a screen, and display an image. The projection display separates a unit of time configuring the image data into an effective light time when the light modulating device can express the light as an image on the screen and an ineffective light time when the light modulating device cannot express the light as an image on the screen. The projection display increases the power supplied to the light source during the effective light time over the power supplied to the light source during the ineffective light time.
    Type: Application
    Filed: June 12, 2007
    Publication date: June 12, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shigeki HARADA, Takayoshi Nagai, Ikuro Suga, Akihiko Iwata, Yoshiteru Suzuki, Akira Okumura, Jun Someya, Kuniko Kojima
  • Patent number: 6836262
    Abstract: In a reset period, through applying a rectangular pulse (Pya) of positive polarity to an electrode (Y) and applying a CR pulse (Pxa) of negative polarity to an electrode X, a full lighting pulse is applied between the electrodes (X and Y). The application of the voltage is stopped before a CR pulse (Pxc) reaches a final potential, to generate the pulse (Pxa). A full erase pulse (Pxb) made of a CR pulse having a polarity reverse to that of the pulse (Pxa) is applied to the electrode (X). An erase operation reverses the polarity of wall charges accumulated by a full lighting to effectively perform a potential control operation. The potential control pulse (Pxc) is applied to the electrode (X) to generate a discharge, and the state of the wall charges in a discharge cell is controlled by the discharge to generate an optimal amount of wall charges for a subsequent addressing discharge. The final voltage of the pulse (Pxc) is set equal to a voltage (−Vxg) of an address pulse (Pa).
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: December 28, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takashi Hashimoto, Takahiro Urakabe, Akihiko Iwata, Yoshikazu Tsunoda, Takayoshi Nagai
  • Patent number: 6741031
    Abstract: Components of an arrangement interval in first and second directions (v, h) between first to third subpixels (C1, C2, C3) in a pixel (PX) satisfy the following expressions: pv1=pv2=pv/2; pv3=0; and ph1=ph2<ph/3. Components of the arrangement interval in the first and second directions (v, h) between two pixels (PX) adjacent to each other in the second direction (h) satisfy the following expressions: pv4=pv/2 (=p/2); pv5=0; and ph4>ph/3. Pixels (PX) adjacent to each other in the first direction (v) have the same arrangement of the first to third subpixels (C1, C2, C3).
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: May 25, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigeki Harada, Takayoshi Nagai, Kou Sano, Shinsuke Yura
  • Patent number: 6608610
    Abstract: A plasma display device and a method of driving a plasma display which are capable of performing suitable display control in response to the signal format of an input signal are provided. Either a television signal or a graphic signal is inputted as the input signal. A signal format identification circuit identifies whether the signal format of the input signal is the television signal or the graphic signal. A mode-by-mode control signal generating portion determines the driving sequence of a driving circuit in response to the identified signal format to perform the driving control of the driving circuit. Then, a display panel is driven in response to the signal format of the input signal to display an image.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: August 19, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayoshi Nagai
  • Publication number: 20030132709
    Abstract: Components of an arrangement interval in first and second directions (v, h) between first to third subpixels (C1, C2, C3) in a pixel (PX) satisfy the following expressions: pv1=pv2=pv/2; pv3=0; and ph1=ph2<ph/3. Components of the arrangement interval in the first and second directions (v, h) between two pixels (PX) adjacent to each other in the second direction (h) satisfy the following expressions: pv4=pv/2 (=p/2); pv5=0; and ph4>ph/3. Pixels (PX) adjacent to each other in the first direction (v) have the same arrangement of the first to third subpixels (C1, C2, C3).
    Type: Application
    Filed: June 11, 2002
    Publication date: July 17, 2003
    Inventors: Shigeki Harada, Takayoshi Nagai, Kou Sano, Shinsuke Yura
  • Patent number: 6577061
    Abstract: Of three primary color phosphors (38) formed in unit luminescent areas (EU) constituting a pixel (EG), the width of a blue phosphor (38B) is about twice the width of red and green phosphors (38R, 38G). This allows a white color temperature of 9300 K without causing deterioration of the phosphors (38) and degrading red and green gradations.
    Type: Grant
    Filed: February 23, 1999
    Date of Patent: June 10, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ko Sano, Takayoshi Nagai, Shinichiro Nagano, Kanzou Yoshikawa, Takeo Saikatsu, Toyohiro Uchiumi
  • Publication number: 20020180354
    Abstract: Of three primary color phosphors (38) formed in unit luminescent areas (EU) constituting a pixel (EG), the width of a blue phosphor (38B) is about twice the width of red and green phosphors (38R, 38G). This allows a white color temperature of 9300 K without causing deterioration of the phosphors (38) and degrading red and green gradations.
    Type: Application
    Filed: February 23, 1999
    Publication date: December 5, 2002
    Inventors: KO SANO, TAKAYOSHI NAGAI, SHINICHIRO NAGANO, KANZOU YOSHIKAWA, TAKEO SAIKATSU, TOYOHIRO UCHIUMI
  • Patent number: 6483250
    Abstract: A synthetic round pulse generation circuit can output constant currents (i1, i2). By charging a capacitance element (CP) with the constant currents (i1, i2), a ramp pulse (10a) having a rate of voltage change of i1/CP and a ramp pulse (10b) having a rate of voltage change of i2/CP are applied to the capacitance element (CP). A synthetic round pulse (11) consists of the ramp pulse (10a) and the ramp pulse (10b). In the synthetic round pulse (11), the lengths of application time periods (T10a, T10b) are set so that a discharge is started with the ramp pulse (10a). Further, the rate of voltage change (i1/CP) of the ramp pulse (10a) is set to a small value so that the intensity of the discharge at a discharge starting time (t11f) in the application time period (T10a) may be sufficiently weak. When a PDP is driven with the synthetic round pulse, it is thereby possible to reduce an application time of the round waveform.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: November 19, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takashi Hashimoto, Takahiro Urakabe, Akihiko Iwata, Yoshikazu Tsunoda, Takayoshi Nagai
  • Patent number: 6476801
    Abstract: A plasma display device and a method of driving a plasma display which are capable of performing suitable display control in response to the signal format of an input signal are provided. Either a television signal or a graphic signal is inputted as the input signal. A signal format identification circuit identifies whether the signal format of the input signal is the television signal or the graphic signal. A mode-by-mode control signal generating portion determines the driving sequence of a driving circuit in response to the identified signal format to perform the driving control of the driving circuit. Then, a display panel is driven in response to the signal format of the input signal to display an image.
    Type: Grant
    Filed: March 23, 1998
    Date of Patent: November 5, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayoshi Nagai
  • Patent number: 6448947
    Abstract: Sustain electrodes X1 to Xn and X2n+1 to X3n are connected to a first common driver 4XA, and sustain electrodes Xn+1 to X2n and X3n+1 to X4n are connected to a second X common driver 4XB. Scan electrodes Y1 to Y2n are connected to a first Y common driver 3Ya through a first scan driver 2Ya having each output terminal connected with each of these electrodes, and scan electrodes Y2n+1 to Y4n are connected to a second Y common driver 3Yb through a second scan driver 2Yb having each output terminal connected with each of these electrodes. Voltages are sequentially supplied to four blocks BLAa, BLAb, BLBa and BLBb divided as matrix combination of the first or second X common driver 4XA or 4XB and the first or second common driver 3Ya or 3Yb at staggered timing. Thus, reduction of a peak current in discharge, miniaturization of the common drivers, cost reduction and reduction of power consumption are attained.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: September 10, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayoshi Nagai
  • Publication number: 20020084954
    Abstract: A plasma display device and a method of driving a plasma display which are capable of performing suitable display control in response to the signal format of an input signal are provided. Either a television signal or a graphic signal is inputted as the input signal. A signal format identification circuit (4) identifies whether the signal format of the input signal is the television signal or the graphic signal. A mode-by-mode control signal generating portion (5) determines the driving sequence of a driving circuit (7) in response to the identified signal format to perform the driving control of the driving circuit (7). Then, a display panel (8) is driven in response to the signal format of the input signal to display an image.
    Type: Application
    Filed: December 20, 2001
    Publication date: July 4, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayoshi Nagai
  • Publication number: 20020044105
    Abstract: A plasma display device and a method of driving a plasma display which are capable of performing suitable display control in response to the signal format of an input signal are provided. Either a television signal or a graphic signal is inputted as the input signal. A signal format identification circuit (4) identifies whether the signal format of the input signal is the television signal or the graphic signal. A mode-by-mode control signal generating portion (5) determines the driving sequence of a driving circuit (7) in response to the identified signal format to perform the driving control of the driving circuit (7). Then, a display panel (8) is driven in response to the signal format of the input signal to display an image.
    Type: Application
    Filed: March 23, 1998
    Publication date: April 18, 2002
    Inventor: TAKAYOSHI NAGAI
  • Patent number: 6359390
    Abstract: A panel and a drive circuit substrate are disposed within a conductive shielding case. Between the panel and the drive circuit substrate, a conductive holding board or separately provided conductive material is provided, and connected to the conductive shielding case by a connecting element so as to surround the drive circuit substrate to be the source of noise. This forms an electromagnetic shield for the drive circuit. Further, a conductive layer is formed on an upper part of an insulating film of a wiring board which connects the panel and the drive circuit substrate. The conductive layer may be connected to, for example, the conductive shielding case and the holding board to be forced to have a ground potential. This provides an electromagnetic shield to the wiring board as well as preventing emission of noise from a gap between the panel and the conductive shielding case.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: March 19, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayoshi Nagai
  • Publication number: 20010017605
    Abstract: In a reset period, through applying a rectangular pulse (Pya) of positive polarity to an electrode (Y) and applying a CR pulse (Pxa) of negative polarity to an electrode X, a full lighting pulse is applied between the electrodes (X and Y). The application of the voltage is stopped before a CR pulse (Pxc) reaches a final potential, to generate the pulse (Pxa). A full erase pulse (Pxb) made of a CR pulse having a polarity reverse to that of the pulse (Pxa) is applied to the electrode (X). An erase operation reverses the polarity of wall charges accumulated by a full lighting to effectively perform a potential control operation. The potential control pulse (Pxc) is applied to the electrode (X) to generate a discharge, and the state of the wall charges in a discharge cell is controlled by the discharge to generate an optimal amount of wall charges for a subsequent addressing discharge. The final voltage of the pulse (Pxc) is set equal to a voltage (−Vxg) of an address pulse (Pa).
    Type: Application
    Filed: February 14, 2001
    Publication date: August 30, 2001
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Takashi Hashimoto, Takahiro Urakabe, Akihiko Iwata, Yoshikazu Tsunoda, Takayoshi Nagai
  • Patent number: 6243084
    Abstract: Before applying a pulse (Vp) of the first voltage for uniforming charges between each of the first electrodes X and each of the second electrode Y1 to Yn which are adjacent to each other, a pulse (Vpp) of the fifth voltage which has a reverse polarity to that of the pulse of the first voltage and is lower than the pulse of the first voltage and higher than the pulse of the fourth voltage for sustaining a discharge is applied between the first and second electrodes. Thus, in a method for driving a plasma display in which cells are provided at intersections of a plurality of electrodes, a full write discharge is surely caused even if residual wall charges are left, and luminous efficiency is increased.
    Type: Grant
    Filed: April 17, 1998
    Date of Patent: June 5, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayoshi Nagai
  • Patent number: 6160349
    Abstract: A panel (10) and a drive circuit substrate (12) are disposed within a conductive shielding case (20). Between the panel (10) and the drive circuit substrate (12), a conductive holding board (16) or separately provided conductive material is provided, and connected to the conductive shielding case (20) by a connecting means (22) so as to surround the drive circuit substrate (12) to be the source of noise. This forms an electromagnetic shield for the drive circuit (12). Further, a conductive layer is formed on an upper part of an insulating film of a wiring board (25) which connects the panel (10) and the drive circuit substrate (12). The conductive layer may be connected to, for example, the conductive shielding case (20) and the holding board (16) to be forced to have a ground potential. This provides an electromagnetic shield to the wiring board (25) as well as preventing emission of noise from a gap between the panel (10) and the conductive shielding case (20).
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: December 12, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayoshi Nagai
  • Patent number: 6091380
    Abstract: A 3-electrode, surface-discharge type plasma display is capable of offsetting a radiation fields which is generated at the time of displaying, to reduce radiation noises. To drive the plasma display, an X-electrode and a Y-electrode are separated to an even number (2m) and an odd number (2m-1), respectively. During a resetting period and an addressing period, pulse voltage is applied to the even-numbered and odd-numbered electrodes at the same time, whereas in a sustained discharge period, the phase of the pulse voltage applied to the even-numbered electrode is delayed by 180 degrees from that applied to the odd-numbered electrode.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: July 18, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takashi Hashimoto, Takeo Saikatsu, Soichiro Okuda, Shinji Tanabe, Takayoshi Nagai
  • Patent number: 6011355
    Abstract: A plasma display device which is capable of solving the problem of a trade-off between the increase in recovery efficiency of reactive power resulting from charging and discharging of a plasma display panel serving as a capacitive load and the adverse effects upon a gas discharge characteristic in the plasma display panel is provided. First and second sustain pulses are applied respectively to first and second electrodes (X, Y1-Yn) arranged in parallel in pairs for respective display lines so that the output time periods of the first and second sustain pulses partially overlap each other on the time axis. One of the first and second sustain pulses which rises earlier has a higher rate of voltage change at the rising and falling edges than does the other.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: January 4, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayoshi Nagai