Patents by Inventor Takayuki Dohi

Takayuki Dohi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9518339
    Abstract: A method for growing an epitaxial film on a surface of a semiconductor wafer by mounting the wafer within a susceptor pocket and supplying source gas and carrier gas to the upper surface side of the susceptor and supplying carrier gas to the lower surface side of the susceptor. The susceptor includes a substantially circular bottom wall and a sidewall encompassing the bottom wall to form a pocket for mounting the wafer, wherein a plurality of circular through-holes are formed in the bottom wall in an outer peripheral region a distance of up to about ½ the radius toward the center of the bottom wall. The total opening surface area of the through-holes is 0.05 to 55% of the surface area of the bottom wall, the opening surface area of each through-hole is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: December 13, 2016
    Assignee: SUMCO Corporation
    Inventors: Masayuki Ishibashi, John F. Krueger, Takayuki Dohi, Daizo Horie, Takashi Fujikawa
  • Patent number: 9340900
    Abstract: A method of producing an epitaxial wafer, comprising: performing epitaxial growth of silicon on a main surface of a wafer made of a silicon single crystal; performing surface flattening pretreatment of a main surface of the wafer using a treatment liquid of a predetermined composition at a temperature of 100° C. or less, thereby forming an oxide film of a predetermined thickness while removing particles adhered on the main surface of the wafer; and performing a surface polishing step where the main surface of the wafer is mirror polished.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: May 17, 2016
    Assignee: Sumco Corporation
    Inventors: Shinji Nakahara, Masato Sakai, Takayuki Dohi
  • Patent number: 9127374
    Abstract: A method for growing an epitaxial film on a surface of a semiconductor wafer by mounting the wafer within a susceptor pocket and supplying source gas and carrier gas to the upper surface side of the susceptor and supplying carrier gas to the lower surface side of the susceptor. The susceptor includes a substantially circular bottom wall and a sidewall encompassing the bottom wall to form a pocket for mounting the wafer, wherein a plurality of circular through-holes are formed in the bottom wall in an outer peripheral region a distance of up to about ½ the radius toward the center of the bottom wall. The total opening surface area of the through-holes is 0.05 to 55% of the surface area of the bottom wall, the opening surface area of each through-hole is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: September 8, 2015
    Assignee: SUMCO CORPORATION
    Inventors: Masayuki Ishibashi, John F. Krueger, Takayuki Dohi, Daizo Horie, Takashi Fujikawa
  • Publication number: 20150114282
    Abstract: A method for growing an epitaxial film on a surface of a semiconductor wafer by mounting the wafer within a susceptor pocket and supplying source gas and carrier gas to the upper surface side of the susceptor and supplying carrier gas to the lower surface side of the susceptor. The susceptor includes a substantially circular bottom wall and a sidewall encompassing the bottom wall to form a pocket for mounting the wafer, wherein a plurality of circular through-holes are formed in the bottom wall in an outer peripheral region a distance of up to about ½ the radius toward the center of the bottom wall. The total opening surface area of the through-holes is 0.05 to 55% of the surface area of the bottom wall, the opening surface area of each through-hole is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2.
    Type: Application
    Filed: December 24, 2014
    Publication date: April 30, 2015
    Applicant: SUMCO CORPORATION
    Inventors: Masayuki ISHIBASHI, John F. KRUEGER, Takayuki DOHI, Daizo HORIE, Takashi FUJIKAWA
  • Publication number: 20150107511
    Abstract: A method for growing an epitaxial film on a surface of a semiconductor wafer by mounting the wafer within a susceptor pocket and supplying source gas and carrier gas to the upper surface side of the susceptor and supplying carrier gas to the lower surface side of the susceptor. The susceptor includes a substantially circular bottom wall and a sidewall encompassing the bottom wall to form a pocket for mounting the wafer, wherein a plurality of circular through-holes are formed in the bottom wall in an outer peripheral region a distance of up to about ½ the radius toward the center of the bottom wall. The total opening surface area of the through-holes is 0.05 to 55% of the surface area of the bottom wall, the opening surface area of each through-hole is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2.
    Type: Application
    Filed: December 24, 2014
    Publication date: April 23, 2015
    Applicant: SUMCO CORPORATION
    Inventors: Masayuki ISHIBASHI, John F. KRUEGER, Takayuki DOHI, Daizo HORIE, Takashi FUJIKAWA
  • Patent number: 8926754
    Abstract: A susceptor for use in an epitaxial growth apparatus and method where a plurality of circular through-holes are formed in the bottom wall of a pocket in an outer peripheral region a distance of up to about ½ the radius toward the center of the circular bottom wall. The total opening surface area of these through-holes is 0.05 to 55% of the surface area of the bottom wall. The opening surface area of each of the through-holes provided at this outer peripheral region is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2. After a semiconductor wafer is mounted in the pocket, epitaxial growth is carried out while source gas and carrier gas (i.e., reactive gas) is made to flow on the upper surface side of the susceptor and carrier gas is made to flow on the lower surface side.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: January 6, 2015
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Masayuki Ishibashi, John F. Krueger, Takayuki Dohi, Daizo Horie, Takashi Fujikawa
  • Patent number: 8152919
    Abstract: An epitaxial silicon wafer is provided in which an epitaxial layer is grown on a silicon wafer having a plane inclined from a {110} plane of a silicon single crystal as a main surface. In the silicon wafer for growing the epitaxial layer thereon, an inclination angle azimuth of the {110} plane is in the range of 0 to 45 degrees as measured from a <100> orientation parallel to the {110} plane toward a <100> direction. With such an arrangement, LPDs of 100 nm or less can be measured from a {110} wafer that has a carrier mobility (including the hole and electron mobilities) higher than that of a {100} wafer. Also, surface roughness degradation in the {110} wafer can be suppressed. Also, the surface state of the {110} wafer can be measured. Further, a quality evaluation can be performed on the {110} wafer.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: April 10, 2012
    Assignee: Sumco Corporation
    Inventors: Takayuki Dohi, Shinji Nakahara, Masaya Sakurai, Masato Sakai
  • Publication number: 20110239931
    Abstract: An epitaxial silicon wafer is provided in which an epitaxial layer is grown on a silicon wafer having a plane inclined from a {110} plane of a silicon single crystal as a main surface. In the silicon wafer for growing the epitaxial layer thereon, an inclination angle azimuth of the {110} plane is in the range of 0 to 45 degrees as measured from a <100> orientation parallel to the {110} plane toward a <100> direction. With such an arrangement, LPDs of 100 nm or less can be measured from a {110} wafer that has a carrier mobility (including the hole and electron mobilities) higher than that of a {100} wafer. Also, surface roughness degradation in the {110} wafer can be suppressed. Also, the surface state of the {110} wafer can be measured. Further, a quality evaluation can be performed on the {110} wafer.
    Type: Application
    Filed: June 20, 2011
    Publication date: October 6, 2011
    Applicant: SUMCO CORPORATION
    Inventors: Takayuki Dohi, Shinji Nakahara, Masaya Sakurai, Masato Sakai
  • Patent number: 7989073
    Abstract: An epitaxial silicon wafer is provided in which an epitaxial layer is grown on a silicon wafer having a plane inclined from a {110} plane of a silicon single crystal as a main surface. In the silicon wafer for growing the epitaxial layer thereon, an inclination angle azimuth of the {110} plane is in the range of 0 to 45 degrees as measured from a <100> orientation parallel to the {110} plane toward a <110 > direction. With such an arrangement, LPDs of 100 nm or less can be measured from a {110} wafer that has a carrier mobility (including the hole and electron mobilities) higher than that of a {100 } wafer. Also, surface roughness degradation in the {110} wafer can be suppressed. Also, the surface state of the {110} wafer can be measured. Further, a quality evaluation can be performed on the {110} wafer.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: August 2, 2011
    Assignee: Sumco Corporation
    Inventors: Takayuki Dohi, Shinji Nakahara, Masaya Sakurai, Masato Sakai
  • Publication number: 20090314210
    Abstract: A susceptor for use in an epitaxial growth apparatus and method where a plurality of circular through-holes are formed in the bottom wall of a pocket in an outer peripheral region a distance of up to about ½ the radius toward the center of the circular bottom wall. The total opening surface area of these through-holes is 0.05 to 55% of the surface area of the bottom wall. The opening surface area of each of the through-holes provided at this outer peripheral region is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2. After a semiconductor wafer is mounted in the pocket, epitaxial growth is carried out while source gas and carrier gas (i.e., reactive gas) is made to flow on the upper surface side of the susceptor and carrier gas is made to flow on the lower surface side.
    Type: Application
    Filed: August 25, 2009
    Publication date: December 24, 2009
    Inventors: Masayuki Ishibashi, John F. Krueger, Takayuki Dohi, Daizo Horie, Takashi Fujikawa
  • Publication number: 20080110401
    Abstract: In a susceptor (10) having a wafer pocket (101) for receiving a wafer W at the time of vapor-phase growth, the wafer pocket has at least a first pocket portion (102) for loading an outer circumferential portion of the wafer and a second pocket portion (103) formed to be lower than the first pocket and having a smaller diameter than that of the first pocket portion, and a fluid passage (105) having one end (105a) opening on a vertical wall (103a) of said second pocket portion and the other end (105b) opening on a back surface (104) or a side surface (106) of the susceptor is formed.
    Type: Application
    Filed: May 17, 2005
    Publication date: May 15, 2008
    Applicant: SUMCO CORPORATION
    Inventors: Takashi Fujikawa, Masayuki Ishibashi, Takayuki Dohi, Seiji Sugimoto
  • Publication number: 20080057324
    Abstract: A method of producing an epitaxial wafer, comprising: performing epitaxial growth of silicon on a main surface of a wafer made of a silicon single crystal; performing surface flattening pretreatment of a main surface of the wafer using a treatment liquid of a predetermined composition at a temperature of 100° C. or less, thereby forming an oxide film of a predetermined thickness while removing particles adhered on the main surface of the wafer; and performing a surface polishing step where the main surface of the wafer is mirror polished.
    Type: Application
    Filed: September 5, 2007
    Publication date: March 6, 2008
    Applicant: SUMCO CORPORATION
    Inventors: Shinji Nakahara, Masato Sakai, Takayuki Dohi
  • Publication number: 20080057323
    Abstract: An epitaxial silicon wafer is provided in which an epitaxial layer is grown on a silicon wafer having a plane inclined from a {110} plane of a silicon single crystal as a main surface. In the silicon wafer for growing the epitaxial layer thereon, an inclination angle azimuth of the {110} plane is in the range of 0 to 45 degrees as measured from a <100> orientation parallel to the {110} plane toward a <110> direction. With such an arrangement, LPDs of 100 nm or less can be measured from a {110} wafer that has a carrier mobility (including the hole and electron mobilities) higher than that of a {100} wafer. Also, surface roughness degradation in the {110} wafer can be suppressed. Also, the surface state of the {110} wafer can be measured. Further, a quality evaluation can be performed on the {110} wafer.
    Type: Application
    Filed: September 5, 2007
    Publication date: March 6, 2008
    Applicant: SUMCO CORPORATION
    Inventors: Takayuki Dohi, Shinji Nakahara, Masaya Sakurai, Masato Sakai
  • Patent number: 6971835
    Abstract: A single opening is formed in a central portion of a susceptor of a vapor phase epitaxial growth system. Consequently, any dopant diffused off outwardly from the back surface of a wafer during an epitaxial growth process can be exhausted through the opening to the beneath side with respect to the susceptor. As a result, it may become difficult for auto-doping to be induced, even with no protective film formed on a back surface of the wafer. Uniformity in a dopant concentration in the surface may be improved and thus a resistivity may be made uniform. Further, since a temperature of the back surface of the wafer is measured through the opening, a heating temperature can be controlled stably, thus allowing a precise temperature control thereof. Consequently, the epitaxial film as well as the distribution of its resistivity may be made uniform across the entire wafer.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: December 6, 2005
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Masayuki Ishibashi, Takayuki Dohi
  • Publication number: 20050000449
    Abstract: A susceptor for use in an epitaxial growth apparatus and method where a plurality of circular through-holes are formed in the bottom wall of a pocket in an outer peripheral region a distance of up to about ½ the radius toward the center of the circular bottom wall. The total opening surface area of these through-holes is 0.05 to 55% of the surface area of the bottom wall. The opening surface area of each of the through-holes provided at this outer peripheral region is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2. After a semiconductor wafer is mounted in the pocket, epitaxial growth is carried out while source gas and carrier gas (i.e., reactive gas) is made to flow on the upper surface side of the susceptor and carrier gas is made to flow on the lower surface side.
    Type: Application
    Filed: December 23, 2002
    Publication date: January 6, 2005
    Inventors: Masayuki Ishibashi, John Krueger, Takayuki Dohi, Daizo Horie, Takashi Fujikawa
  • Publication number: 20030119283
    Abstract: A single opening is formed in a central portion of a susceptor of a vapor phase epitaxial growth system. Consequently, any dopant diffused off outwardly from the back surface of a wafer during an epitaxial growth process can be exhausted through the opening to the beneath side with respect to the susceptor. As a result, it may become difficult for auto-doping to be induced, even with no protective film formed on a back surface of the wafer. Uniformity in a dopant concentration in the surface may be improved and thus a resistivity may be made uniform. Further, since a temperature of the back surface of the wafer is measured through the opening, a heating temperature can be controlled stably, thus allowing a precise temperature control thereof. Consequently, the epitaxial film as well as the distribution of its resistivity may be made uniform across the entire wafer.
    Type: Application
    Filed: December 20, 2002
    Publication date: June 26, 2003
    Inventors: Masayuki Ishibashi, Takayuki Dohi