Patents by Inventor Takayuki MAEKURA

Takayuki MAEKURA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230232624
    Abstract: A semiconductor structure includes an alternating stack of insulating layers and composite layers. Each of the composite layers includes a plurality of electrically conductive word line strips laterally extending along a first horizontal direction and a plurality of dielectric isolation strips laterally extending along the first horizontal direction and interlaced with the plurality of electrically conductive word line strips. Rows of memory openings are arranged along the first horizontal direction. Each row of memory openings vertically extends through each insulating layer within the alternating stack and one electrically conductive strip for each of the composite layers. Rows of memory opening fill structures are located within the rows of memory openings. Each of the memory opening fill structures includes a respective vertical stack of memory elements and a respective vertical semiconductor channel.
    Type: Application
    Filed: January 18, 2022
    Publication date: July 20, 2023
    Inventors: Takaaki IWAI, Takashi INOMATA, Takayuki MAEKURA
  • Publication number: 20220302146
    Abstract: A three-dimensional memory device includes a first-tier alternating stack of first insulating layers and first electrically conductive layers, a second-tier alternating stack of second insulating layers and second electrically conductive layers, a vertically alternating sequence of insulating plates and dielectric material plates laterally surrounded by the second-tier alternating stack, memory openings vertically extending through each layer within the first-tier alternating stack and the second-tier alternating stack, memory opening fill structures located in the memory openings, first contact via structures vertically extending through the vertically alternating sequence and contacting a respective one of the first electrically conductive layers, and second contact via structures contacting a respective one of the second electrically conductive layers.
    Type: Application
    Filed: June 13, 2022
    Publication date: September 22, 2022
    Inventors: Kenichi SHIMOMURA, Takayuki MAEKURA
  • Patent number: 11367736
    Abstract: A first-tier structure includes a first vertically alternating sequence of first continuous insulating layers and first continuous sacrificial material layers and a first-tier retro-stepped dielectric material portion overlying first stepped surfaces of the first vertically alternating sequence. A second vertically alternating sequence of second continuous insulating layers and second continuous sacrificial material layers is formed over the first-tier structure. A vertically alternating stack of insulating plates and dielectric material is formed over the first-tier retro-stepped dielectric material portion. Alternatively, dielectric pillar structures may be formed in lieu of the vertically alternating stack. After formation of memory stack structures, electrically conductive layers replace portions of the first and second continuous sacrificial material layers.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: June 21, 2022
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Hirofumi Tokita, Takayuki Maekura, Romain Mentek
  • Patent number: 11355506
    Abstract: A first-tier structure includes a first vertically alternating sequence of first continuous insulating layers and first continuous sacrificial material layers and a first-tier retro-stepped dielectric material portion overlying first stepped surfaces of the first vertically alternating sequence. A second vertically alternating sequence of second continuous insulating layers and second continuous sacrificial material layers is formed over the first-tier structure. A vertically alternating stack of insulating plates and dielectric material is formed over the first-tier retro-stepped dielectric material portion. Alternatively, dielectric pillar structures may be formed in lieu of the vertically alternating stack. After formation of memory stack structures, electrically conductive layers replace portions of the first and second continuous sacrificial material layers.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: June 7, 2022
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Hirofumi Tokita, Takayuki Maekura, Romain Mentek
  • Publication number: 20210366924
    Abstract: A first-tier structure includes a first vertically alternating sequence of first continuous insulating layers and first continuous sacrificial material layers and a first-tier retro-stepped dielectric material portion overlying first stepped surfaces of the first vertically alternating sequence. A second vertically alternating sequence of second continuous insulating layers and second continuous sacrificial material layers is formed over the first-tier structure. A vertically alternating stack of insulating plates and dielectric material is formed over the first-tier retro-stepped dielectric material portion. Alternatively, dielectric pillar structures may be formed in lieu of the vertically alternating stack. After formation of memory stack structures, electrically conductive layers replace portions of the first and second continuous sacrificial material layers.
    Type: Application
    Filed: May 22, 2020
    Publication date: November 25, 2021
    Inventors: Hirofumi TOKITA, Takayuki MAEKURA, Romain MENTEK
  • Publication number: 20210366920
    Abstract: A first-tier structure includes a first vertically alternating sequence of first continuous insulating layers and first continuous sacrificial material layers and a first-tier retro-stepped dielectric material portion overlying first stepped surfaces of the first vertically alternating sequence. A second vertically alternating sequence of second continuous insulating layers and second continuous sacrificial material layers is formed over the first-tier structure. A vertically alternating stack of insulating plates and dielectric material is formed over the first-tier retro-stepped dielectric material portion. Alternatively, dielectric pillar structures may be formed in lieu of the vertically alternating stack. After formation of memory stack structures, electrically conductive layers replace portions of the first and second continuous sacrificial material layers.
    Type: Application
    Filed: May 22, 2020
    Publication date: November 25, 2021
    Inventors: Hirofumi TOKITA, Takayuki MAEKURA, Romain MENTEK