Patents by Inventor Takayuki Matsuzuka

Takayuki Matsuzuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9543902
    Abstract: A power amplifier includes: an amplifier; an input matching circuit connected to an input of the amplifier; an output matching circuit connected to an output of the amplifier; and a low-frequency processing circuit connected to the input matching circuit or the output matching circuit, wherein the low-frequency processing circuit includes a first line having a first end connected to the input matching circuit or the output matching circuit, a first shot stub connected to a second end of the first line and including a second line and a first capacitor connected in series each other, and a second short stub connected to the second end of the first line in parallel with the first short stub and including a third line and a second capacitor which are connected in series each other, the first line has a length of ?/8, the second line has a length of ?/4, and the third line has a length of ?/8 with respect to a wavelength ? of a fundamental frequency.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: January 10, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takayuki Matsuzuka, Junichi Udomoto, Tetsuo Kunii, Hiromitsu Utsumi
  • Publication number: 20160285421
    Abstract: A power amplifier includes: an amplifier; an input matching circuit connected to an input of the amplifier; an output matching circuit connected to an output of the amplifier; and a low-frequency processing circuit connected to the input matching circuit or the output matching circuit, wherein the low-frequency processing circuit includes a first line having a first end connected to the input matching circuit or the output matching circuit, a first shot stub connected to a second end of the first line and including a second line and a first capacitor connected in series each other, and a second short stub connected to the second end of the first line in parallel with the first short stub and including a third line and a second capacitor which are connected in series each other, the first line has a length of ?/8, the second line has a length of ?/4, and the third line has a length of ?/8 with respect to a wavelength ? of a fundamental frequency.
    Type: Application
    Filed: October 29, 2015
    Publication date: September 29, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki MATSUZUKA, Junichi UDOMOTO, Tetsuo KUNII, Hiromitsu UTSUMI
  • Patent number: 8917144
    Abstract: A power amplifier includes: an amplification element amplifying an input signal; and a bias circuit supplying a bias current to an input of the amplification element. The bias circuit includes a reference voltage terminal to which a battery voltage is applied from a battery, a first resistor having a first end connected to the reference voltage terminal, a second resistor connected between a second end of the first resistor and ground, and a first transistor. The first transistor has a control terminal connected to a connection point between the first resistor and the second resistor, a first terminal connected to a power supply, and a second terminal connected to the input of the amplification element. The first and second resistors are the same material.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 23, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuhiro Iyomasa, Takayuki Matsuzuka
  • Patent number: 8686795
    Abstract: A power amplifier includes: an amplifier having a base into which input signals are input, a collector to which a collector voltage is supplied, and an emitter; and a bias circuit for supplying a bias current to the base of the amplifier. The bias circuit includes a first transistor having a first control terminal into which a reference voltage is input, a first terminal to which a power voltage is applied, and a second terminal connected to the base of the amplifier. A capacitance adjusting circuit elevates capacitance between a grounding point and at least one of the first control terminal and the first terminal when the collector voltage of the amplifier is lowered.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: April 1, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Atsushi Okamura, Takayuki Matsuzuka
  • Publication number: 20140070890
    Abstract: A power amplifier includes: an amplification element amplifying an input signal; and a bias circuit supplying a bias current to an input of the amplification element. The bias circuit includes a reference voltage terminal to which a battery voltage is applied from a battery, a first resistor having a first end connected to the reference voltage terminal, a second resistor connected between a second end of the first resistor and ground, and a first transistor. The first transistor has a control terminal connected to a connection point between the first resistor and the second resistor, a first terminal connected to a power supply, and a second terminal connected to the input of the amplification element. The first and second resistors are the same material.
    Type: Application
    Filed: March 15, 2013
    Publication date: March 13, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazuhiro Iyomasa, Takayuki Matsuzuka
  • Patent number: 8659352
    Abstract: A power amplifier includes: a first amplifying element amplifying an input signal; a second amplifying element amplifying an output signal of the first amplifying element; a third amplifying element amplifying the input signal; a first switch connected between an output of the first amplifying element and an input of second amplifying element; a second switch connected between an output of the first amplifying element and an output of the third amplifying element; a third switch connected between an output of the first amplifying element and an output of the second amplifying element; a reference voltage generating a circuit generating reference voltage; a bias circuit supplying a bias current, based on the reference voltage, to inputs of the first, second, and third amplifying elements; and a control circuit controlling the first, second and third switches and the reference voltage generating circuit.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: February 25, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takayuki Matsuzuka, Kazuhiro Iyomasa
  • Publication number: 20130241659
    Abstract: A power amplifier includes: a first amplifying element amplifying an input signal; a second amplifying element amplifying an output signal of the first amplifying element; a third amplifying element amplifying the input signal; a first switch connected between an output of the first amplifying element and an input of second amplifying element; a second switch connected between an output of the first amplifying element and an output of the third amplifying element; a third switch connected between an output of the first amplifying element and an output of the second amplifying element; a reference voltage generating a circuit generating reference voltage; a bias circuit supplying a bias current, based on the reference voltage, to inputs of the first, second, and third amplifying elements; and a control circuit controlling the first, second and third switches and the reference voltage generating circuit.
    Type: Application
    Filed: August 31, 2012
    Publication date: September 19, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki Matsuzuka, Kazuhiro Iyomasa
  • Publication number: 20130207729
    Abstract: A power amplifier includes: an amplifier having a base into which input signals are input, a collector to which a collector voltage is supplied, and an emitter; and a bias circuit for supplying a bias current to the base of the amplifier. The bias circuit includes a first transistor having a first control terminal into which a reference voltage is input, a first terminal to which a power voltage is applied, and a second terminal connected to the base of the amplifier. A capacitance adjusting circuit elevates capacitance between a grounding point and at least one of the first control terminal and the first terminal when the collector voltage of the amplifier is lowered.
    Type: Application
    Filed: September 12, 2012
    Publication date: August 15, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Atsushi Okamura, Takayuki Matsuzuka
  • Patent number: 8461929
    Abstract: A power amplifier includes a first amplifier unit, a second amplifier unit, and an attenuator. The second amplifier receives a signal from the first amplifier unit and amplifies the signal. The attenuator is provided between the first and second amplifier units. The attenuator has arms, including at least one parallel arm and at least one series arm, and has switches connected to the arms to switch the electrical connection states of the arms with respect to the first and second amplifier units. The at least one parallel arm and the at least one series arm are alternately arranged, in the order named, as viewed in the direction from the first amplifier unit to the second amplifier unit.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: June 11, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Takayuki Matsuzuka, Kenji Mukai
  • Patent number: 8432227
    Abstract: A power amplifier includes: an amplifying element having a base into which input signals are inputted, a collector to which a collector voltage is applied, and an emitter; and a bias circuit supplying a bias current to the base of the amplifying element. The bias circuit includes a bias current lowering circuit which lowers the bias current when the collector voltage is lower than a prescribed threshold value.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: April 30, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Atsushi Okamura, Kazuya Yamamoto, Takayuki Matsuzuka
  • Patent number: 8354888
    Abstract: A power amplifier includes an input matching circuit, an amplifier transistor for amplifying an input signal received through the input matching circuit, an element for varying the collector voltage of the amplifier transistor, a bias circuit for varying the idle current in the amplifier transistor, and a compensation circuit for varying capacitance of the input matching circuit to maintain the phase shift and the input reflection in the power amplifier constant when the collector voltage and the idle current are varied, to prevent a decrease in the efficiency of the power amplifier due to changes in the output power of the amplifier transistor.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: January 15, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takayuki Matsuzuka, Kazuya Yamamoto, Takao Moriwaki
  • Publication number: 20120306579
    Abstract: A power amplifier includes: an amplifying element having a base into which input signals are inputted, a collector to which a collector voltage is applied, and an emitter; and a bias circuit supplying a bias current to the base of the amplifying element. The bias circuit includes a bias current lowering circuit which lowers the bias current when the collector voltage is lower than a prescribed threshold value.
    Type: Application
    Filed: November 22, 2011
    Publication date: December 6, 2012
    Applicant: Mitsubishi Electric Corporation
    Inventors: Atsushi OKAMURA, Kazuya Yamamoto, Takayuki Matsuzuka
  • Patent number: 8217722
    Abstract: A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: July 10, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Satoshi Suzuki, Takayuki Matsuzuka
  • Publication number: 20120154055
    Abstract: A power amplifier includes a first amplifier unit, a second amplifier unit, and an attenuator. The second amplifier receives a signal from the first amplifier unit and amplifies the signal. The attenuator is provided between the first and second amplifier units. The attenuator has arms, including at least one parallel arm and at least one series arm, and has switches connected to the arms to switch the electrical connection states of the arms with respect to the first and second amplifier units. The at least one parallel arm and the at least one series arm are alternately arranged, in the order named, as viewed in the direction from the first amplifier unit to the second amplifier unit.
    Type: Application
    Filed: August 1, 2011
    Publication date: June 21, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Takayuki Matsuzuka, Kenji Mukai
  • Publication number: 20120146733
    Abstract: A power amplifier includes an input matching circuit, an amplifier transistor for amplifying an input signal received through the input matching circuit, an element for varying the collector voltage of the amplifier transistor, a bias circuit for varying the idle current in the amplifier transistor, and a compensation circuit for varying capacitance of the input matching circuit to maintain the phase shift and the input reflection in the power amplifier constant when the collector voltage and the idle current are varied, to prevent a decrease in the efficiency of the power amplifier due to changes in the output power of the amplifier transistor.
    Type: Application
    Filed: August 1, 2011
    Publication date: June 14, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki Matsuzuka, Kazuya Yamamoto, Takao Moriwaki
  • Patent number: 8138836
    Abstract: An emitter-follower bias circuit supplying a bias voltage to the base of an amplification transistor includes: a depletion mode FET boosting a reference voltage; and an emitter-follower circuit generating the bias voltage in response to the reference voltage boosted by the depletion mode FET.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: March 20, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takayuki Matsuzuka, Kazuya Yamamoto, Tomoyuki Asada
  • Publication number: 20120062321
    Abstract: A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
    Type: Application
    Filed: April 4, 2011
    Publication date: March 15, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Satoshi Suzuki, Takayuki Matsuzuka
  • Publication number: 20110187459
    Abstract: An emitter-follower bias circuit supplying a bias voltage to the base of an amplification transistor includes: a depletion mode FET boosting a reference voltage; and an emitter-follower circuit generating the bias voltage in response to the reference voltage boosted by the depletion mode FET.
    Type: Application
    Filed: September 3, 2010
    Publication date: August 4, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki Matsuzuka, Kazuya Yamamoto, Tomoyuki Asada
  • Patent number: 7936219
    Abstract: A power amplifier and bias circuit includes a combination circuit in which a voltage drive bias circuit and a current drive bias circuit are connected in a parallel relationship with each other. The power amplifier bias circuit also includes an idle current control circuit which uses the collector voltage of amplifier transistors. When the collector voltage of the amplifier transistors is lower than the threshold voltage of a first transistor (approximately 1.3 V), the first transistor is turned off. At that time, since the reference voltage (2.4-2.5 V) is higher than the voltage for turning on both a second transistor and a diode (namely, approximately 1.3 V plus 0.7 V), a current flows and the first transistor turns on. As a result, a current is drawn from the bases of the amplifier transistors to GND through two resistances, so that the idle currents of the amplifier transistors decrease.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: May 3, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takayuki Matsuzuka, Kazuya Yamamoto, Atsushi Okamura
  • Publication number: 20110018639
    Abstract: A power amplifier and bias circuit includes a combination circuit in which a voltage drive bias circuit and a current drive bias circuit are connected in a parallel relationship with each other. The power amplifier bias circuit also includes an idle current control circuit which uses the collector voltage of amplifier transistors. When the collector voltage of the amplifier transistors is lower than the threshold voltage of a first transistor (approximately 1.3 V), the first transistor is turned off. At that time, since the reference voltage (2.4-2.5 V) is higher than the voltage for turning on both a second transistor and a diode (namely, approximately 1.3 V plus 0.7 V), a current flows and the first transistor turns on. As a result, a current is drawn from the bases of the amplifier transistors to GND through two resistances, so that the idle currents of the amplifier transistors decrease.
    Type: Application
    Filed: February 25, 2010
    Publication date: January 27, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki Matsuzuka, Kazuya Yamamoto, Atsushi Okamura