Abstract: According to one embodiment, a synchronous rectification type power circuit includes a first power terminal to which a voltage on a high potential side is supplied, a second power terminal to which a voltage on a low potential side is supplied, an output terminal that outputs an output voltage to a load having an inductance and a capacitor, a first switch unit connected between the first power terminal and the output terminal, a second switch unit connected between the second power terminal and the output terminal, a control signal generating circuit which controls ON/OFF of the first and second switch units, and a control circuit that compares the output voltage with a predetermined reference voltage for a predetermined period when the second switch unit is turned OFF. A timing for turning OFF the second switch unit is adjusted based on a result of the comparison.

Abstract: Provided is a semicarbazide composition comprising: a semicarbazide compound (A) having an amino group and a semicarbazide group; a semicarbazide compound (B-1) having a structure with a semicarbazide group substituted for the amino group of the semicarbazide compound (A); a semicarbazide compound (B-2) as a dimer of the semicarbazide compound (B-1); and a semicarbazide compound (B-3) as a trimer of the semicarbazide compound (B-1); the semicarbazide composition having an analysis area ratio (a) of 0.008% or more and 2% or less.

Abstract: According to one embodiment, provided is a semiconductor storage device that includes a control circuit to control the voltage that is applied to the memory cell. The control circuit is configured to execute a reset operation that applies a reset voltage of a first polarity to a selected memory cell that is connected to a selected first wire and a selected second wire during a reset operation. The control circuit is configured to execute a cancel operation that applies a cancel voltage of a second polarity that is opposite to the first polarity to an unselected memory cell and at the same time can execute a verify operation that reads out the state of the selected memory cell by applying a readout voltage of the second polarity to the selected memory cell. The cancel voltage and the readout voltage are the same voltage value.

Abstract: According to one embodiment, a DC-DC converter includes a comparator circuit that compares a feedback voltage of an output voltage with a reference voltage and a control circuit that controls an output voltage based on an output signal of the comparator circuit. The comparator circuit performs a discrete-time operation in response to a clock signal, and a frequency of the clock signal is adjusted according to a load condition.

Abstract: According to one embodiment, provided is a semiconductor storage device that includes a control circuit to control the voltage that is applied to the memory cell. The control circuit is configured to execute a reset operation that applies a reset voltage of a first polarity to a selected memory cell that is connected to a selected first wire and a selected second wire during a reset operation. The control circuit is configured to execute a cancel operation that applies a cancel voltage of a second polarity that is opposite to the first polarity to an unselected memory cell and at the same time can execute a verify operation that reads out the state of the selected memory cell by applying a readout voltage of the second polarity to the selected memory cell. The cancel voltage and the readout voltage are the same voltage value.

Abstract: There is provided a reference voltage generating apparatus including: a reference voltage source, a voltage retaining circuit, a switch and a controller. The reference voltage source generates a reference voltage. The voltage retaining circuit includes a first element circuit and a second element circuit, and the voltage retaining circuit outputs a voltage of a connection node between a first terminal of the first element circuit and a second terminal of the second element circuit. The switch is connected between the connection node and the reference voltage source. The controller controls the reference voltage source and the switch. The first element circuit includes at least a resistance component and the first element circuit is supplied with a first voltage at a third terminal and the second element circuit includes a resistance component and a capacity component and the second element circuit is supplied with a second voltage at a fourth terminal.

Abstract: A semiconductor device includes a first static actuator having a first drive electrode and a second drive electrode, the first drive electrode and the second drive electrode being capable of coming close to each other upon shifting from an open state to a close state due to an electrostatic attractive force against an elastic force thereof; a detection circuit configured to detect a temperature of the first static actuator; and a drive circuit configured to apply a first voltage between the first drive electrode and the second drive electrode to maintain the first static actuator in the closed state between the first drive electrode and the second drive electrode, and to switch a polarity of the first voltage every first time period. The drive circuit varies a length of the first time period based on a detection result of the detection circuit.

Abstract: A power supply circuit includes a first switch, a second switch, an inductor, a series circuit, a second resistor, and a control signal circuit. The first and second switches are connected between a first terminal and a second terminal and to each other at an output node. The inductor is connected between the output node and an output terminal. The series circuit is connected in parallel with the inductor and includes a first resistor and a capacitor connected to each other at a common connection node. The second resistor is connected in parallel with the capacitor. The control signal circuit compares a voltage at the common connection node to a reference voltage to generate a control signal for at least the first switch based on the comparison.

Abstract: A housing for an electronic device unit includes a first case and a second case that are formed in a shape of a box with one of respective surfaces thereof being opened and are formed to be a box body. The housing includes an insulating plate that extends from the opening part of the first case to a side of the second case and overlaps with a wall surface of the second case. An engaging convex part is formed on a surface where the insulating plate is overlapped and an engaging hole that engages with the engaging convex part to regulate separation of the first case and the second case is formed. The insulating plate is in a shape in which an edge of the insulating plate spreads with a predetermined width from an opening edge where the first case and the second case are butted and the engaging hole.

Abstract: According to one embodiment, there is provided a power circuit including a DC/DC converter, an A/D converter, a control unit, a determining unit, and a conversion timing adjusting unit. The determining unit determines whether a transition timing of the conversion candidate timing signal overlaps a transition timing of the first switching signal or a transition timing of the second switching signal. The conversion timing adjusting unit adjusts the conversion candidate timing signal so that the transition timing of the conversion candidate timing signal does not overlap the transition timing of the first switching signal and the transition timing of the second switching signal when the transition timing of the conversion candidate timing signal overlaps the transition timing of the first switching signal or the transition timing of the second switching signal to thereby generate the conversion timing signal.

Abstract: According to one embodiment, provided is a semiconductor storage device that includes a control circuit to control the voltage that is applied to the memory cell. The control circuit is configured to execute a reset operation that applies a reset voltage of a first polarity to a selected memory cell that is connected to a selected first wire and a selected second wire during a reset operation. The control circuit is configured to execute a cancel operation that applies a cancel voltage of a second polarity that is opposite to the first polarity to an unselected memory cell and at the same time can execute a verify operation that reads out the state of the selected memory cell by applying a readout voltage of the second polarity to the selected memory cell. The cancel voltage and the readout voltage are the same voltage value.

Abstract: According to one embodiment, a synchronous rectification type power circuit includes a first power terminal to which a voltage on a high potential side is supplied, a second power terminal to which a voltage on a low potential side is supplied, an output terminal that outputs an output voltage to a load having an inductance and a capacitor, a first switch unit connected between the first power terminal and the output terminal, a second switch unit connected between the second power terminal and the output terminal, a control signal generating circuit which controls ON/OFF of the first and second switch units, and a control circuit that compares the output voltage with a predetermined reference voltage for a predetermined period when the second switch unit is turned OFF. A timing for turning OFF the second switch unit is adjusted based on a result of the comparison.

Abstract: According to one embodiment, a semiconductor device includes an electrostatic actuator including first and second lower electrodes, an upper electrode, and an insulating film provided between the upper electrode and the first and second lower electrodes, the first lower electrode and upper electrode configuring a first variable capacitance element, the second lower electrode and upper electrode configuring a second variable capacitance element, a first fixed capacitance element connected to the first lower electrode, a second fixed capacitance element connected to the second lower electrode, and a detection circuit connected to the upper electrode and configured to detect a charge amount stored in the insulating film.

Abstract: By rendering lower half of 30 FPS in the processing of even numbered frame of 60 fps and rendering upper half of 30 fps in the processing of odd numbered frame, the processing load of the processor 70 can be reduced to half. Thus, by delaying image rendering, the image quality degradation can be prevented, therefore stable high-quality images can be displayed.

Abstract: According to one embodiment, there is provided a power circuit including a DC/DC converter, an A/D converter, a control unit, a determining unit, and a conversion timing adjusting unit. The determining unit determines whether a transition timing of the conversion candidate timing signal overlaps a transition timing of the first switching signal or a transition timing of the second switching signal. The conversion timing adjusting unit adjusts the conversion candidate timing signal so that the transition timing of the conversion candidate timing signal does not overlap the transition timing of the first switching signal and the transition timing of the second switching signal when the transition timing of the conversion candidate timing signal overlaps the transition timing of the first switching signal or the transition timing of the second switching signal to thereby generate the conversion timing signal.

Abstract: A housing for an electronic device unit includes a first case and a second case that are formed in a shape of a box with one of respective surfaces thereof being opened and are formed to be a box body. The housing includes an insulating plate that extends from the opening part of the first case to a side of the second case and overlaps with a wall surface of the second case. An engaging convex part is formed on a surface where the insulating plate is overlapped and an engaging hole that engages with the engaging convex part to regulate separation of the first case and the second case is formed. The insulating plate is in a shape in which an edge of the insulating plate spreads with a predetermined width from an opening edge where the first case and the second case are butted and the engaging hole.

Abstract: According to one embodiment, a semiconductor device includes an electrostatic actuator including first and second lower electrodes, an upper electrode, and an insulating film provided between the upper electrode and the first and second lower electrodes, the first lower electrode and upper electrode configuring a first variable capacitance element, the second lower electrode and upper electrode configuring a second variable capacitance element, a first fixed capacitance element connected to the first lower electrode, a second fixed capacitance element connected to the second lower electrode, and a detection circuit connected to the upper electrode and configured to detect a charge amount stored in the insulating film.

Abstract: A semiconductor device controls an electrostatic actuator having first and second electrodes formed so as to come close to each other when transition occurs from opened state to closed state by electrostatic attraction against elastic force. The semiconductor device includes: a voltage generation unit generating different applied voltages to be applied to the first and second electrodes; a control unit controlling the voltage generation unit to switch the applied voltages; and a detection unit detecting voltage of the first or second electrode or a rate of change in the voltage. The control unit controls a target voltage of the voltage generation unit to be switched from a first voltage to a second voltage lower than the first voltage according to a detection output by the detection unit.

Abstract: Provided is a block polyisocyanate composition comprising at least one block polyisocyanate represented by formula (I): R-(A)X(B)y. In formula (I), R is a residue obtained by removing an isocyanate group from a polyisocyanate composed of one or more polyisocyanates selected from aliphatic polyisocyanates, alicyclic polyisocyanates, and aromatic polyisocyanates and is bonded to a substituent containing A and B; A is a group of one or more keto compounds represented by formula (II) or enol isomers thereof; B is one or more constituent units represented by formula (III); and the sum of x and y is from 2.0 to 20, and x is not 0.

Abstract: Provided is a makeup cosmetic which has a good feeling of use, without showing tautness or stiffness as in the case of using a silicone-based resin film or an offensive odor as in the case of using polyisoprene, and exhibits a good effect of preventing color migration. This makeup cosmetic is characterized by comprising polyisobutylene having a relative mass of 30,000-100,000 and a volatile hydrocarbon oil. Also provided are a top coating agent, which can be appropriately applied on the aforesaid makeup cosmetic, imparts glossiness and shows little color migration or blurring, a makeup kit comprising the aforesaid makeup cosmetic and the top coating agent, and a makeup method using the makeup kit.