Patents by Inventor Takayuki Nakao

Takayuki Nakao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10762827
    Abstract: According to an embodiment, in a display device, pixels have memories respectively. A signal supply circuit includes a mode control circuit, and switches into a first mode or a second mode to supply digital data pieces to sub-pixels. In the first mode, the circuit receives from the outside first video data pieces corresponding to n sub-pixels, and supplies digital data pieces for the n sub-pixels to corresponding memories. In the second mode, the signal supply circuit receives from the outside second video data pieces corresponding to m sub-pixels fewer than n sub-pixels, and supplies digital data pieces for the n sub-pixels to corresponding memories based on the second video data pieces.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: September 1, 2020
    Assignee: Japan Display Inc.
    Inventors: Takayuki Nakao, Takehiro Shima
  • Publication number: 20200273420
    Abstract: A display device includes: a plurality of sub-pixels each including a memory block that includes a plurality of memories each of which is configured to store sub-pixel data; a plurality of memory selection line groups provided to respective rows and each including a plurality of memory selection lines electrically coupled to the corresponding memory blocks in the sub-pixels that belong to a corresponding row; a memory selection circuit configured to simultaneously output a memory selection signal to the memory selection line groups, the memory selection signal being a signal for selecting one from the plurality of memories in each of the memory blocks. In accordance with the memory selection lines supplied with the memory selection signal, the sub-pixels display an image based on the sub-pixel data stored in memories in the respective sub-pixels, the memories each being one of the plurality of memories in the corresponding sub-pixel.
    Type: Application
    Filed: May 12, 2020
    Publication date: August 27, 2020
    Inventors: Yutaka Mitsuzawa, Takayuki Nakao, Masaya Tamaki, Yutaka Ozawa
  • Publication number: 20200235478
    Abstract: In an array antenna apparatus, a first height of top faces of plurality of antenna elements is greater than or equal to a second height of a first top of a first electronic component relative to a first primary surface. The first electronic component is the tallest among one or more electronic components mounted on fourth primary surfaces of one or more first external circuit boards. A third height of a second primary surface is greater than a fourth height of fourth primary surfaces. Accordingly, the array antenna apparatus has good antenna characteristics.
    Type: Application
    Filed: March 8, 2018
    Publication date: July 23, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoichi KITAMURA, Takumi NAGAMINE, Takayuki NAKAO, Kiyoshi ISHIDA, Tetsu OWADA
  • Publication number: 20200226996
    Abstract: According to an aspect, a display device includes: two pixels having different areas; a first signal line extending in an arrangement direction of the two pixels and coupled to one of the two pixels; a second signal line extending in the arrangement direction and coupled to the other of the two pixels; and a scan line extending between the two pixels in an intersection direction intersecting the arrangement direction and coupled to the two pixels.
    Type: Application
    Filed: January 14, 2020
    Publication date: July 16, 2020
    Inventors: Takayuki NAKAO, Takehiro SHIMA
  • Patent number: 10692455
    Abstract: A display device includes: a plurality of sub-pixels each including a memory block that includes a plurality of memories each of which is configured to store sub-pixel data; a plurality of memory selection line groups provided to respective rows and each including a plurality of memory selection lines electrically coupled to the corresponding memory blocks in the sub-pixels that belong to a corresponding row; a memory selection circuit configured to simultaneously output a memory selection signal to the memory selection line groups, the memory selection signal being a signal for selecting one from the plurality of memories in each of the memory blocks. In accordance with the memory selection lines supplied with the memory selection signal, the sub-pixels display an image based on the sub-pixel data stored in memories in the respective sub-pixels, the memories each being one of the plurality of memories in the corresponding sub-pixel.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: June 23, 2020
    Assignee: Japan Display Inc.
    Inventors: Yutaka Mitsuzawa, Takayuki Nakao, Masaya Tamaki, Yutaka Ozawa
  • Patent number: 10677442
    Abstract: A highly reliable light emitting apparatus which emits light with high efficiency is obtained. The light emitting apparatus includes a light emitting member, a refrigerant, and a housing. The light emitting member includes a first surface including a phosphor irradiated with light to emit light, and a second surface different from the first surface. The refrigerant cools the light emitting member. The housing includes a holding portion for holding the refrigerant. A surface of the housing is provided with an opening communicating with the holding portion. The light emitting member is connected to the housing such that the second surface closes the opening.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: June 9, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki Nakao, Naoki Sawai
  • Publication number: 20200152159
    Abstract: A display device includes: sub-pixels each including a memory block including memories; memory selection line groups each including memory selection lines electrically coupled to the memory blocks in the sub-pixels that belong to the corresponding row; a memory selection circuit configured to concurrently output memory selection signals to the memory selection line groups; a potential line; a conduction switch provided for at least one memory in the memory block on a one-to-one basis; and an operating-memory conduction circuit configured to output, to the conduction switch, an operation signal for determining whether to electrically couple or uncouple the potential line and the corresponding one memory. Each memory is capable of storing sub-pixel data therein when being coupled to the potential line. Each sub-pixel displays an image based on the sub-pixel data stored in one memory in the sub-pixel according to the memory selection line supplied with the memory selection signal.
    Type: Application
    Filed: January 9, 2020
    Publication date: May 14, 2020
    Inventors: Masaya TAMAKI, Yutaka MITSUZAWA, Takayuki NAKAO, Yutaka OZAWA
  • Publication number: 20200152147
    Abstract: A display device is provided and includes sub-pixels each including a sub-pixel electrode, and a first and second memory; a clock signal output circuit configured to, based on a reference clock signal, output a plurality of clock signals having different frequencies; a selection circuit configured to select one of the clock signals as a selected clock signal; a memory selection circuit configured to select all of the first memories included in all the sub-pixels or all of the second memories included in all the sub-pixels in synchronization with the selected clock signal; a common electrode facing all of the sub-pixel electrodes; and a common-electrode driving circuit configured to provide a common potential to the common electrode, wherein the common potential is inverted in synchronization with the reference clock signal, wherein the sub-pixel electrode is driven based on sub-pixel data stored in the selected one of the memories to display an image.
    Type: Application
    Filed: January 16, 2020
    Publication date: May 14, 2020
    Inventors: Yutaka MITSUZAWA, Takayuki NAKAO, Yutaka OZAWA, Masaya TAMAKI
  • Patent number: 10593304
    Abstract: According to one embodiment, a signal supply circuit used for a display device includes a plurality of subpixels each including a memory. The signal supply circuit includes a first mode. The first mode receives first video data in a unit of n bits corresponding to the subpixels from outside, and supplies digital data for the subpixels in a unit of m bits less than n bits to the subpixels based on the first video data.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: March 17, 2020
    Assignee: Japan Display Inc.
    Inventor: Takayuki Nakao
  • Patent number: 10559286
    Abstract: A display device includes: sub-pixels each including a memory block including memories; memory selection line groups each including memory selection lines electrically coupled to the memory blocks in the sub-pixels that belong to the corresponding row; a memory selection circuit configured to concurrently output memory selection signals to the memory selection line groups; a potential line; a conduction switch provided for at least one memory in the memory block on a one-to-one basis; and an operating-memory conduction circuit configured to output, to the conduction switch, an operation signal for determining whether to electrically couple or uncouple the potential line and the corresponding one memory. Each memory is capable of storing sub-pixel data therein when being coupled to the potential line. Each sub-pixel displays an image based on the sub-pixel data stored in one memory in the sub-pixel according to the memory selection line supplied with the memory selection signal.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: February 11, 2020
    Assignee: Japan Display Inc.
    Inventors: Masaya Tamaki, Yutaka Mitsuzawa, Takayuki Nakao, Yutaka Ozawa
  • Patent number: 10553167
    Abstract: A display device includes: a plurality of sub-pixels each including a memory block; a clock signal output circuit configured to output a plurality of clock signals having different frequencies; a selection circuit configured to select one of the clock signals as a selected clock signal; a plurality of memory selection line groups provided for respective rows; a memory selection circuit configured to output a memory selection signal concurrently to the memory selection line groups in synchronization with the selected clock signal, the memory selection signal being a signal for selecting one from a plurality of memories in each of the memory blocks; a common electrode to which a common potential common to the sub-pixels is supplied; and a common-electrode driving circuit configured to switch the common potential in synchronization with the reference clock signal and output the switched common potential.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: February 4, 2020
    Assignee: Japan Display Inc.
    Inventors: Yutaka Mitsuzawa, Takayuki Nakao, Yutaka Ozawa, Masaya Tamaki
  • Patent number: 10495276
    Abstract: A vehicle light source unit includes an optical supporting portion that supports the optical portion, a metal-made supporting portion, a fixing portion that fixes the metal-made supporting portion and the optical supporting portion in a partial and mutual manner, and a sliding portion that slidably supports the metal-made supporting portion and the optical supporting portion in a partial and mutual manner; the sliding portion is configured in such a way that the metal-made supporting portion and the optical supporting portion can slide on each other in a sliding direction and in such a way as to not only support the optical supporting portion against the metal-made supporting portion but also support the metal-made supporting portion against the optical supporting portion, toward the both sides of a supporting direction that are perpendicular to the sliding direction.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: December 3, 2019
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki Nakao, Naoki Sawai, Yuri Toda
  • Publication number: 20190362682
    Abstract: According to one embodiment, a display device includes a pixel electrode and a memory provided in each of pixels, a common electrode, a signal line to which a digital signal is supplied, a first drive line to which a display signal is supplied, a second drive line to which a non-display signal is supplied, a storage control circuit which stores the digital signal in the memory in a storage period, and a select control circuit which selectively supplies, in a display period, to the pixel electrode, one of the display signal and the non-display signal. The second drive circuit maintains potential of the common signal of the display period in the storage period when the display period transitions to the storage period.
    Type: Application
    Filed: August 12, 2019
    Publication date: November 28, 2019
    Applicant: Japan Display Inc.
    Inventors: Takehiro Shima, Takayuki Nakao
  • Patent number: 10467976
    Abstract: According to one embodiment, a drive circuit for a display device includes a plurality of pixels. Each of the pixels includes a memory, and a display element driven based on output data of the memory. The drive circuit includes a storage control circuit for storing, in the memory, the data from a signal line, and a display control circuit which provides the display element with a display signal or a non-display signal based on the data stored in the memory. The drive circuit changes a display area from a first display state to a second display state. When the drive circuit sets the display area to the second display state, the drive circuit supplies a signal which does not depend on the image data to the display element.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: November 5, 2019
    Assignee: JAPAN DISPLAY INC.
    Inventors: Takayuki Nakao, Takehiro Shima
  • Patent number: 10438550
    Abstract: According to one embodiment, a display device includes a pixel electrode and a memory provided in each of pixels, a common electrode, a signal line to which a digital signal is supplied, a first drive line to which a display signal is supplied, a second drive line to which a non-display signal is supplied, a storage control circuit which stores the digital signal in the memory in a storage period, and a select control circuit which selectively supplies, in a display period, to the pixel electrode, one of the display signal and the non-display signal. The second drive circuit maintains potential of the common signal of the display period in the storage period when the display period transitions to the storage period.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: October 8, 2019
    Assignee: Japan Display Inc.
    Inventors: Takehiro Shima, Takayuki Nakao
  • Patent number: 10438570
    Abstract: According to an aspect, a display apparatus includes: a plurality of pixels each of which includes a memory for storing a signal; a plurality of image signal lines each of which is configured to supply the signal; a plurality of switches each of which is included in a corresponding one of the pixels and couples a corresponding one of the image signal lines to the memory of the corresponding one of the pixels; a plurality of gate signal lines; a plurality of logic circuits coupled in series, the logic circuit at a most upstream stage being configured to receive a control signal, and each of the logic circuits being configured to output an output signal; and a plurality of control circuits each of which is configured to output a gate signal to a corresponding one of the gate signal lines based on the control signal or the output signal.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: October 8, 2019
    Assignee: Japan Display Inc.
    Inventors: Takayuki Nakao, Takehiro Shima
  • Publication number: 20190277486
    Abstract: A highly reliable light emitting apparatus which emits light with high efficiency is obtained. The light emitting apparatus includes a light emitting member, a refrigerant, and a housing. The light emitting member includes a first surface including a phosphor irradiated with light to emit light, and a second surface different from the first surface. The refrigerant cools the light emitting member. The housing includes a holding portion for holding the refrigerant. A surface of the housing is provided with an opening communicating with the holding portion. The light emitting member is connected to the housing such that the second surface closes the opening.
    Type: Application
    Filed: November 16, 2017
    Publication date: September 12, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takayuki NAKAO, Naoki SAWAI
  • Publication number: 20190279587
    Abstract: According to one embodiment, a drive circuit for a display device includes a plurality of pixels. Each of the pixels includes a memory, and a display element driven based on output data of the memory. The drive circuit includes a storage control circuit for storing, in the memory, the data from a signal line, and a display control circuit which provides the display element with a display signal or a non-display signal based on the data stored in the memory. The drive circuit changes a display area from a first display state to a second display state. When the drive circuit sets the display area to the second display state, the drive circuit supplies a signal which does not depend on the image data to the display element.
    Type: Application
    Filed: May 24, 2019
    Publication date: September 12, 2019
    Applicant: JAPAN DISPLAY INC.
    Inventors: Takayuki NAKAO, Takehiro SHIMA
  • Publication number: 20190221151
    Abstract: According to an embodiment, in a display device, pixels have memories respectively. A signal supply circuit includes a mode control circuit, and switches into a first mode or a second mode to supply digital data pieces to sub-pixels. In the first mode, the circuit receives from the outside first video data pieces corresponding to n sub-pixels, and supplies digital data pieces for the n sub-pixels to corresponding memories. In the second mode, the signal supply circuit receives from the outside second video data pieces corresponding to m sub-pixels fewer than n sub-pixels, and supplies digital data pieces for the n sub-pixels to corresponding memories based on the second video data pieces.
    Type: Application
    Filed: March 28, 2019
    Publication date: July 18, 2019
    Applicant: Japan Display Inc.
    Inventors: Takayuki Nakao, Takehiro Shima
  • Patent number: 10347206
    Abstract: According to one embodiment, a drive circuit for a display device includes a plurality of pixels. Each of the pixels includes a memory, and a display element driven based on output data of the memory. The drive circuit includes a storage control circuit for storing, in the memory, the data from a signal line, and a display control circuit which provides the display element with a display signal or a non-display signal based on the data stored in the memory. The drive circuit changes a display area from a first display state to a second display state. When the drive circuit sets the display area to the second display state, the drive circuit supplies a signal which does not depend on the image data to the display element.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: July 9, 2019
    Assignee: Japan Display Inc.
    Inventors: Takayuki Nakao, Takehiro Shima