Abstract: The touch detecting circuit is a capacitive detecting circuit correctable with a sensor capacitance, and includes an integration capacitance. In the touch detecting circuit, a sensor capacitance connected with the touch detecting circuit is charged and discharged; electric charges to input and output for charging and discharging the sensor capacitance are cumulatively added to the integration capacitance. The electric charges to he added to the integration capacitance are inverted in polarity according to directions of charge transfer accompanying the charge and discharge. Not only when charging the sensor capacitance, but also when discharging the sensor capacitance, the absolute values of electric charges to be moved are integrated and therefore, the amount of signals is doubled.

Abstract: Embodiments herein describe a touch panel controller that has a first mode and a second mode. The touch panel controller performs a normal scan in the first mode, and performs a low-power scan in the second mode. In the normal scan, all of detection points are targeted for detection on a touch detection plane of a touch panel. In the low-power scan, only every other electrode in a group of electrodes is used to generate detection data.

Abstract: A touch detecting circuit includes a discharging circuit, a detecting circuit, and a calibration circuit that is configured with a calibration capacitor connected to a terminal and a current source which is connected to the terminal and can be controlled so as to be on and off, that can be connected via the terminal to a sensing capacitor which is disposed on a touch panel, is provided. In the beginning, the sensing capacitor is charged to a predetermined voltage by the charging circuit, thereafter, in a process of discharging, a portion of charge amount that is discharged is used to charge the calibration capacitor, and another portion is discharged via the current source, and the rest is input to the detecting circuit. The detecting circuit measures the charge amount that is input.

Abstract: A touch detecting circuit is allowed to adaptively operate in accordance with an interconnection length to a sensor capacitor of an object to be detected. For example, the touch detecting circuit has a configuration capable of adjusting a threshold value for determination touch and non-touch or a configuration capable of adjusting detection sensitivity of a detection circuit that is connected to the sensor capacitor. For example, the touch detecting circuit has a configuration which includes an adjustment resistor that is connected in series to a signal line for input from the sensor capacitor at an input portion of the detection circuit, and which is capable of performing adjustment to cancel a difference in an interconnection resistance from a sensor capacitor on a far end side to a sensor capacitor on a near end side.

Abstract: A touch panel controller is provided with a calibration circuit that performs offset adjustment with respect to input signals of a plurality of detection circuits corresponding to a plurality of X electrodes of the touch panel, and a storage device that stores first parameter data that specifies an offset adjustment operation of the calibration circuit, and second parameter data for correction for the first parameter data.

Abstract: A touch panel control circuit includes a plurality of drive circuits which are connected to Y sensor electrodes, respectively, and which apply a plurality of pulses to a corresponding Y sensor electrode for every predetermined period, and a plurality of detection circuits which are connected to X sensor electrodes, respectively. Each of the detection circuits includes a switched capacitor circuit that continues sampling of a signal from each of the X sensor electrodes, to which the detection circuits are connected, not only at a timing that is in synchronization with the plurality of pulses that are applied to the Y sensor electrodes, but also at a timing at which the pulses are not applied to the Y sensor electrodes. For example, the switched capacitor circuit is an integration circuit, or an integration circuit with a finite impulse response (FIR) filter or an infinite impulse response (IIR) filter.

Abstract: A touch panel control circuit includes a drive circuit that drives Y electrodes of a touch panel, and a detection circuit that is connected to X electrodes and detects a capacitance value of an intersection capacitor. The drive circuit applies a plurality of pulses to the Y electrodes in a predetermined period. The detection circuit includes a switched capacitor circuit capable of operating with respect to an input signal from the X electrodes in synchronization with the plurality of pulses, and an integration circuit that is connected to an output of the switched capacitor circuit and operates in synchronization with the pulses. The switched capacitor circuit is allowed to operate as a filter, and the switched capacitor circuit is set to have characteristics which have a maximum gain at a direct current and a frequency of a corresponding pulse and in which the gain is suppressed at a frequency therebetween.

Abstract: A clock data recovery circuit which has a high degree of jitter tolerance and can alleviate increase in the phase number of a multi-phase clock, power consumption, and a semiconductor chip area is provided. Each circuit of plural edge detection circuits comprises a first edge detection circuit and a second edge detection circuit. The first detection circuit detects that a data edge leads in phase more than ?1 phase from an edge detection phase, the second detection circuit detects that the data edge laggs in phase more than +1 phase from the edge detection phase. In response to the first output signal or the second output signal, the edge detection phase is changed by the amount of ?1 phase or +1 phase. When the data edge is detected in the range of ±1 phase, a next edge detection phase is maintained in the current state.

Abstract: A semiconductor integrated circuit includes an input circuit for taking in signals and an output circuit for outputting signals. The input circuit is so set that the input impedance during input signal transition is lower than the input impedance on other occasions than input signal transition. The output circuit is so set that the driving force during the second half of signal transition is lower than the driving force during the first half of transition. Such setting that the input impedance during input signal transition is lower than the input impedance on other occasions than input signal transition reduces reflected waves during input signal transition. Such setting that the driving force during the second half of signal transition is lower than the driving force during the first half of transition suppresses production of reflected waves during the second half of signal transition.

Abstract: A semiconductor integrated circuit includes an input circuit for taking in signals and an output circuit for outputting signals. The input circuit is so set that the input impedance during input signal transition is lower than the input impedance on other occasions than input signal transition. The output circuit is so set that the driving force during the second half of signal transition is lower than the driving force during the first half of transition. Such setting that the input impedance during input signal transition is lower than the input impedance on other occasions than input signal transition reduces reflected waves during input signal transition. Such setting that the driving force during the second half of signal transition is lower than the driving force during the first half of transition suppresses production of reflected waves during the second half of signal transition.

Abstract: In a CMOS gate array, each of bonding pads corresponding to input cells for signals and bonding pads corresponding to input cells for supply voltages is formed of a plurality of conductor layers, whereas each of bonding pads (non-connected pads) corresponding to input/output cells not to be used is formed of, for example, the uppermost conductor layer. Thus, the bonding pad (non-connected pad) corresponding to the input/output cell not to be used becomes greater in the thickness of an underlying insulator film and longer in its spacing from a semiconductor substrate in comparison with each of the bonding pad for the signal and the bonding pad for the supply voltage.