Abstract: 1) A graft material for nerve regeneration characterizing by comprising collagen-based materials containing collagen having an orientation. 2) A method for producing a graft material for nerve regeneration comprising a step of immersing the collagen-based materials containing collagen having an orientation in a solution containing a collagen-binding site-containing growth factor comprising a receptor agonist peptide and a collagen-binding peptide and binding the collagen-binding site-containing growth factor to the collagen. 3) A kit for producing a graft material for nerve regeneration characterized by comprising collagen-based materials containing collagen having an orientation, and a collagen-binding site-containing growth factor comprising a receptor agonist peptide and a collagen-binding peptide.

Abstract: Disclosed is a collagen powder and/or a collagen derivative powder, which are obtained by dispersing in a hydrophilic organic solvent a crude collagen precipitate which comprises 12 to 50% by mass of a collagen precipitate and/or a collagen derivative precipitate having an average particle size of 1 to 1,000 ?m, recovering solids and then drying the solids. By dispersing the crude collagen precipitate in the hydrophilic organic solvent, the resulting precipitates can be dehydrated, so that drying of the thus obtained solids can be done by air-drying. In addition, the resulting collagen powder and/or collagen derivative powder exhibit excellent solubility due to an increased specific surface area and also have excellent ease of handling with the average particle size being 8 to 1,000 ?m.

Abstract: Provided is a collagen structure characterized by: comprising collagen fibers of 1 to 5 ?m in average diameter; and has a water content of 0 to 15 (w/w)% and a collagen density of 50 to 800 mg/cm3. After generating collagen fibers by neutralizing an acidic collagen solution, the resulting solution is subjected to filtration or the like to form crude collagen fibers having a collagen concentration of 12 to 50 (w/v)%. The thus obtained crude collagen fibers are molded into a prescribed shape and then dried, thereby the collagen structure can be produced. Since the collagen structure is produced using, as raw material, collagen fibers that are formed by association of collagen molecules, the collagen structure has excellent cell infiltration property. Further, since the collagen density of the collagen structure is equivalent to that of in vivo collagen tissue, the collagen structure exhibits excellent tissue regeneration capacity when filled into a defective part in vivo.

Abstract: Disclosed is a collagen powder and/or a collagen derivative powder, which are obtained by dispersing in a hydrophilic organic solvent a crude collagen precipitate which comprises 12 to 50% by mass of a collagen precipitate and/or a collagen derivative precipitate having an average particle size of 1 to 1,000 ?m, recovering solids and then drying the solids. By dispersing the crude collagen precipitate in the hydrophilic organic solvent, the resulting precipitates can be dehydrated, so that drying of the thus obtained solids can be done by air-drying. In addition, the resulting collagen powder and/or collagen derivative powder exhibit excellent solubility due to an increased specific surface area and also have excellent ease of handling with the average particle size being 8 to 1,000 ?m.

Abstract: The light emitting device of the invention comprises a first electrode, a second electrode being light transmitting, and a carrier sandwiched between the first electrode and the second electrode and containing light emitters, wherein the first electrode has a plurality of projections or a pn junction formed with a p-type semiconductor and an n-type semiconductor each on a surface being in contact with the carrier.

Abstract: The light emitting device of the invention comprises a first electrode, a second electrode being light transmitting, and a carrier sandwiched between the first electrode and the second electrode and containing light emitters, wherein the first electrode has a plurality of projections or a pn junction formed with a p-type semiconductor and an n-type semiconductor each on a surface being in contact with the carrier.

Abstract: An encoding processing apparatus includes a first storing section for storing first encoded information and second encoded information, a second storing section for storing a table indicating association relation between the first encoded information and the second encoded information, an arithmetic section for calculating the second encoded information by reading the first encoded information stored in the first storing section and searching the table stored in the second storing section, a third storing section for storing by associating the first encoded information previously read from the first storing section and the second encoded information, a first control section for reading the second encoded information associated with the first encoded information from the third storing section, and a second control section for storing by associating the first encoded information with the second encoded information in the third storing section.

Abstract: The present invention is applied, for example, to a moving image encoding apparatus and decoding apparatus based on ITU-T H.264. Syntax elements with a high frequency of appearance are processed using probability state variables held in a second memory 13 whose access latency is small, and other syntax elements are processed using probability state variables held in a first memory 12 whose access latency is large.

Abstract: An encoding processing apparatus includes a first storing section for storing first encoded information and second encoded information, a second storing section for storing a table indicating association relation between the first encoded information and the second encoded information, an arithmetic section for calculating the second encoded information by reading the first encoded information stored in the first storing section and searching the table stored in the second storing section, a third storing section for storing by associating the first encoded information previously read from the first storing section and the second encoded information, a first control section for reading the second encoded information associated with the first encoded information from the third storing section, and a second control section for storing by associating the first encoded information with the second encoded information in the third storing section.

Abstract: A semiconductor storage device includes a field effect transistor which has a gate insulator, a gate electrode and a pair of source/drain diffusion regions on a semiconductor substrate. The device also includes a coating film made of a dielectric having a function of storing electric charge and formed on the substrate in such a manner as to cover an upper surface and side surfaces of the gate electrode. The device further includes an interlayer insulator formed on and in contact with the coating film. The device still further includes contact members which extend vertically through the interlayer insulator and the coating film on the source/drain diffusion regions and which are electrically connected to the source/drain diffusion regions, respectively. The coating film and the interlayer insulator are made of materials which are selectively etchable to each other. Thus, the issues of overerase and read failures due to the overerase can be solved, and the device reliability can be enhanced.

Abstract: A semiconductor storage element has a memory function body on opposite sides of a gate electrode formed on a semiconductor substrate. Each end of source/drain regions is located in the semiconductor substrate just under the memory function body and offset with respect to an edge of the gate electrode in a gate length direction to improve efficiency of electric charge injection into the memory function body. A storage state in the memory function body is found by detecting a amount of current between the source/drain regions, which current changes depending on the amount of the electric charge retained in the charge retention portion.

Abstract: A semiconductor switching element and a semiconductor storage element each have a gate electrode, a pair of source/drain regions and a channel forming region. Memory function bodies having a function of storing electric charges are provided on opposite sides of the gate electrode of the semiconductor storage element. In the semiconductor storage element, an amount of current that flows from one of the source/drain regions to the other of the source/drain regions upon application of a voltage to the gate electrode is variable depending on an amount of electric charges retained in the memory function body.

Abstract: A hearing aid comprising a data memory includes a plurality of semiconductor memory cells. The semiconductor memory cell has a gate insulating film formed on a semiconductor substrate, on a well region provided in the semiconductor substrate, or on a semiconductor film deposited on an insulator; a single gate electrode formed on the gate insulating film; two memory functional units formed on both sidewalls of the single gate electrode; a channel formation region formed under the single gate electrode; and first diffusion regions disposed on both sides of the channel formation region. The semiconductor memory cell is constituted so as to change an amount of currents flowing from one of the first diffusion regions to the other first diffusion region according to an amount of charges retained in the memory functional unit or a polarization vector when a voltage is applied to the gate electrode.

Abstract: This invention is an MPEG decoding apparatus (10) for decoding a compression-coded image data stream, the apparatus including a motion compensation circuit (15) and error map table holding means (19) for holding an error map table with respect to a decoded frame to be referred to in performing motion compensation. When the error map table is referred to and an error block is found to be included in a reference area, or when dynamic image data of a decoding target block is broken, the motion compensation circuit (15) performs error conceal processing to interpolate a pixel in the decoding target block with a pixel in the decoded frame and output the resulting data. The motion compensation circuit (15) generates an error map table showing the error-concealed block as an error block and stores this error map table. This MPEG decoding apparatus (10) restrains propagation of an error due to the error conceal processing and reduces deterioration in image quality.

Abstract: A semiconductor storage device includes a field effect transistor which has a gate insulator, a gate electrode and a pair of source/drain diffusion regions on a semiconductor substrate. The device also includes a coating film made of a dielectric having a function of storing electric charge and formed on the substrate in such a manner as to cover an upper surface and side surfaces of the gate electrode. The device further includes an interlayer insulator formed on and in contact with the coating film. The device still further includes contact members which extend vertically through the interlayer insulator and the coating film on the source/drain diffusion regions and which are electrically connected to the source/drain diffusion regions, respectively. The coating film and the interlayer insulator are made of materials which are selectively etchable to each other. Thus, the issues of overerase and read failures due to the overerase can be solved, and the device reliability can be enhanced.

Abstract: A semiconductor storage device includes a field effect transistor which has a gate insulator, a gate electrode and a pair of source/drain diffusion regions on a semiconductor substrate. The device also includes a coating film made of a dielectric having a function of storing electric charge and formed on the substrate in such a manner as to cover an upper surface and side surfaces of the gate electrode. The device further includes an interlayer insulator formed on and in contact with the coating film. The device still further includes contact members which extend vertically through the interlayer insulator and the coating film on the source/drain diffusion regions and which are electrically connected to the source/drain diffusion regions, respectively. The coating film and the interlayer insulator are made of materials which are selectively etchable to each other. Thus, the issues of overerase and read failures due to the overerase can be solved, and the device reliability can be enhanced.

Abstract: A memory film operable at a low voltage and a method of manufacturing the memory film; the method, comprising the steps of forming a first insulation film (112) on a semiconductor substrate (111) forming a first electrode, forming a first conductor film (113) on the first insulation film (112), forming a second insulation film (112B) on the surface of the first conductor film (113), forming a third insulation film containing conductor particulates (114, 115) on the second insulation film (112B), and forming a second conductor film forming a second electrode on the third insulation film.

Abstract: A semiconductor memory device including memory cells, each memory cell including: a gate insulating film formed on a semiconductor substrate; a gate electrode formed on the gate insulating film; a channel region located below the gate electrode; a pair of source and drain regions arranged on a opposite sides, respectively, of the channel region, the source and drain regions having a conductive type opposite to that of the channel region; and memory functional units located on opposite sides, respectively, of the gate electrode, each memory functional unit including a charge retaining portion and an anti-dissipation insulator, the charge retaining portion being made of a material serving to store charges, the anti-dissipation insulator serving to prevent the stored charges from being dissipated by separating the charge retaining portion from both the gate electrode and the substrate, wherein a distance between a side wall of the gate electrode and a side of the charge retaining portion facing each other (T2) i

Abstract: A semiconductor storage element has a memory function body on opposite sides of a gate electrode formed on a semiconductor substrate. Each end of source/drain regions is located in the semiconductor substrate just under the memory function body and offset with respect to an edge of the gate electrode in a gate length direction to improve efficiency of electric charge injection into the memory function body. A storage state in the memory function body is found by detecting a amount of current between the source/drain regions, which current changes depending on the amount of the electric charge retained in the charge retention portion.

Abstract: A semiconductor storage device includes a field effect transistor which has a gate insulator, a gate electrode and a pair of source/drain diffusion regions on a semiconductor substrate. The device also includes a coating film made of a dielectric having a function of storing electric charge and formed on the substrate in such a manner as to cover an upper surface and side surfaces of the gate electrode. The device further includes an interlayer insulator formed on and in contact with the coating film. The device still further includes contact members which extend vertically through the interlayer insulator and the coating film on the source/drain diffusion regions and which are electrically connected to the source/drain diffusion regions, respectively. The coating film and the interlayer insulator are made of materials which are selectively etchable to each other. Thus, the issues of overerase and read failures due to the overerase can be solved, and the device reliability can be enhanced.