Patents by Inventor Takayuki Shirasaki

Takayuki Shirasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11815749
    Abstract: A functional element housing package includes a pin terminal disposed in an outer region of a housing for housing a functional element. A wiring substrate is connected with the pin terminal. The wiring substrate includes a through hole for receiving the pin terminal, a first metallic layer disposed around an opening of the through hole on a side of the wiring substrate which side is located close to the housing, a second metallic layer disposed around an opening of the through hole on a side of the wiring substrate which is opposed to the side located close to the housing, the second metallic layer being greater in area than the first metallic layer, a connection wiring line connected to the first metallic layer or the second metallic layer, and a solder which connects the pin terminal to each of the first metallic layer and the second metallic layer.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: November 14, 2023
    Assignee: Kyocera Corporation
    Inventors: Hiroyuki Nakamichi, Takayuki Shirasaki
  • Publication number: 20220406727
    Abstract: Provided is a lid of an electronic component-housing package. The lid includes a conductor layer and a dielectric layer. The conductor layer includes at least one opening and a first part surrounding the at least one opening. The dielectric layer includes a second part, a first dielectric layer, and a second dielectric layer. The second part is located in the at least one opening. The first dielectric layer lies on the top of the conductor layer. The second part lies on the underside of the conductor layer.
    Type: Application
    Filed: October 26, 2020
    Publication date: December 22, 2022
    Applicant: KYOCERA Corporation
    Inventor: Takayuki SHIRASAKI
  • Publication number: 20210208428
    Abstract: A functional element housing package includes a pin terminal disposed in an outer region of a housing for housing a functional element. A wiring substrate is connected with the pin terminal. The wiring substrate includes a through hole for receiving the pin terminal, a first metallic layer disposed around an opening of the through hole on a side of the wiring substrate which side is located close to the housing, a second metallic layer disposed around an opening of the through hole on a side of the wiring substrate which is opposed to the side located close to the housing, the second metallic layer being greater in area than the first metallic layer, a connection wiring line connected to the first metallic layer or the second metallic layer, and a solder which connects the pin terminal to each of the first metallic layer and the second metallic layer.
    Type: Application
    Filed: March 27, 2017
    Publication date: July 8, 2021
    Applicant: KYOCERA Corporation
    Inventors: Hiroyuki NAKAMICHI, Takayuki SHIRASAKI
  • Patent number: 10777493
    Abstract: A semiconductor device mounting board includes a first substrate, a second substrate, a single line, a groove, a feedthrough conductor, and a side conductor. The first substrate includes a mount area and a peripheral area. The second substrate is located in the peripheral area to align with an outer edge of the first substrate and surrounds the mount area. The signal line extends on an upper surface of the second substrate from an inner edge to an outer edge of the second substrate. The groove extends on a side surface of the first substrate from a lower surface to an upper surface of the first substrate. The feedthrough conductor is inside the second substrate and connected to the signal line. The side conductor is on an inner surface of the groove and electrically connected to the feedthrough conductor. The groove is inward from the outer edge of the second substrate.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: September 15, 2020
    Assignee: KYOCERA CORPORATION
    Inventors: Taito Kimura, Takayuki Shirasaki
  • Patent number: 10629505
    Abstract: An electronic component mounting package includes a dielectric substrate between first portions of a pair of signal terminals that protrude from one side in a thickness direction from a first face of a base body. This dielectric substrate has a height lower than a height of the first portions. When an electronic component is mounted, a bonding wire is connected to a tip of each of the first portions to electrically connect the first portion to the electronic component.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: April 21, 2020
    Assignee: Kyocera Corporation
    Inventors: Takayuki Shirasaki, Masahiko Taniguchi, Takashi Miyauchi
  • Patent number: 10462904
    Abstract: An electronic component mounting package includes a body portion which accommodates an electronic component; a flexible substrate. The body portion comprises a notched portion which is open to a lower surface and a side surface thereof, and is provided with a projecting ridge portion which extends along a side end portion of the notched portion on a side surface side of the notched body portion. The flexible substrate extends from an interior of the notched portion to an exterior of the notched portion, and comprises a fixed end portion joined to a terminal of a coaxial connector disposed on a bottom surface of the notched portion, and a free end portion extending to the exterior of the notched portion. The flexible substrate abuts on the projecting ridge portion to be bent.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: October 29, 2019
    Assignee: Kyocera Corporation
    Inventor: Takayuki Shirasaki
  • Publication number: 20190269014
    Abstract: An electronic component mounting package includes a body portion which accommodates an electronic component; a flexible substrate. The body portion comprises a notched portion which is open to a lower surface and a side surface thereof, and is provided with a projecting ridge portion which extends along a side end portion of the notched portion on a side surface side of the notched body portion. The flexible substrate extends from an interior of the notched portion to an exterior of the notched portion, and comprises a fixed end portion joined to a terminal of a coaxial connector disposed on a bottom surface of the notched portion, and a free end portion extending to the exterior of the notched portion. The flexible substrate abuts on the projecting ridge portion to be bent.
    Type: Application
    Filed: November 15, 2018
    Publication date: August 29, 2019
    Applicant: KYOCERA Corporation
    Inventor: Takayuki SHIRASAKI
  • Publication number: 20190221507
    Abstract: A semiconductor device mounting board includes a first substrate, a second substrate, a single line, a groove, a feedthrough conductor, and a side conductor. The first substrate includes a mount area and a peripheral area. The second substrate is located in the peripheral area to align with an outer edge of the first substrate and surrounds the mount area. The signal line extends on an upper surface of the second substrate from an inner edge to an outer edge of the second substrate. The groove extends on a side surface of the first substrate from a lower surface to an upper surface of the first substrate. The feedthrough conductor is inside the second substrate and connected to the signal line. The side conductor is on an inner surface of the groove and electrically connected to the feedthrough conductor. The groove is inward from the outer edge of the second substrate.
    Type: Application
    Filed: July 24, 2017
    Publication date: July 18, 2019
    Applicant: KYOCERA Corporation
    Inventors: Taito KIMURA, Takayuki SHIRASAKI
  • Patent number: 10136517
    Abstract: An electronic component mounting package includes a body portion which accommodates an electronic component; a flexible substrate. The body portion comprises a notched portion which is open to a lower surface and a side surface thereof, and is provided with a projecting ridge portion which extends along a side end portion of the notched portion on a side surface side of the notched body portion. The flexible substrate extends from an interior of the notched portion to an exterior of the notched portion, and comprises a fixed end portion joined to a terminal of a coaxial connector disposed on a bottom surface of the notched portion, and a free end portion extending to the exterior of the notched portion. The flexible substrate abuts on the projecting ridge portion to be bent.
    Type: Grant
    Filed: November 24, 2016
    Date of Patent: November 20, 2018
    Assignee: Kyocera Corporation
    Inventor: Takayuki Shirasaki
  • Publication number: 20180255641
    Abstract: An electronic component mounting package includes a body portion which accommodates an electronic component; a flexible substrate. The body portion comprises a notched portion which is open to a lower surface and a side surface thereof, and is provided with a projecting ridge portion which extends along a side end portion of the notched portion on a side surface side of the notched body portion. The flexible substrate extends from an interior of the notched portion to an exterior of the notched portion, and comprises a fixed end portion joined to a terminal of a coaxial connector disposed on a bottom surface of the notched portion, and a free end portion extending to the exterior of the notched portion. The flexible substrate abuts on the projecting ridge portion to be bent.
    Type: Application
    Filed: November 24, 2016
    Publication date: September 6, 2018
    Applicant: KYOCERA Corporation
    Inventor: Takayuki SHIRASAKI
  • Publication number: 20180145003
    Abstract: An electronic component mounting package includes a dielectric substrate between first portions of a pair of signal terminals that protrude from one side in a thickness direction from a first face of a base body. This dielectric substrate has a height lower than a height of the first portions. When an electronic component is mounted, a bonding wire is connected to a tip of each of the first portions to electrically connect the first portion to the electronic component.
    Type: Application
    Filed: August 19, 2016
    Publication date: May 24, 2018
    Applicant: KYOCERA Corporation
    Inventors: Takayuki SHIRASAKI, Masahiko TANIGUCHI, Takashi MIYAUCHI
  • Patent number: 9596779
    Abstract: An element housing package is provided with: a base plate including, on a top surface, a mounting region for mounting an element; a frame body disposed on the top surface of the base plate so as to surround the mounting region, the frame body including a through-hole; a connector disposed so as to pass through the through-hole T of the frame body and to extend from the inside to the outside of the frame body; a pedestal member disposed on the top surface of the base plate so as to be positioned in the frame body; and a wiring base plate bonded to a top surface of the pedestal member with a first bonding material placed therebetween and connected to the connector.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: March 14, 2017
    Assignee: Kyocera Corporation
    Inventor: Takayuki Shirasaki
  • Publication number: 20160081216
    Abstract: An element housing package is provided with: a base plate including, on a top surface, a mounting region for mounting an element; a frame body disposed on the top surface of the base plate so as to surround the mounting region, the frame body including a through-hole; a connector disposed so as to pass through the through-hole T of the frame body and to extend from the inside to the outside of the frame body; a pedestal member disposed on the top surface of the base plate so as to be positioned in the frame body; and a wiring base plate bonded to a top surface of the pedestal member with a first bonding material placed therebetween and connected to the connector.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 17, 2016
    Applicant: KYOCERA Corporation
    Inventor: Takayuki SHIRASAKI
  • Patent number: 8358180
    Abstract: A high-frequency module has a wiring board including a dielectric substrate, a line conductor that is formed on a first surface of the dielectric substrate, and a first grounding conductor layer that is formed on a second surface opposed to the first surface of the dielectric substrate, and that has a first opening and a second opening disposed around the first opening; and a waveguide that is connected to the second surface, has an opening opposed to the first opening, and is electromagnetically coupled to the line conductor. The wiring board has a vertical choke portion that at least partially extends from the second opening in a direction perpendicular to the second surface. Furthermore, a horizontal choke portion is formed between the wiring board and the waveguide, along the second surface between the opening of the waveguide and the second opening.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: January 22, 2013
    Assignee: Kyocera Corporation
    Inventors: Yoshimasa Sugimoto, Takayuki Shirasaki
  • Publication number: 20100308940
    Abstract: A high frequency wiring board includes a dielectric substrate, a line conductor for high frequency signal transmission formed on a first surface of the dielectric substrate from a connection end to an end, a ground conductor which is disposed aligned with one side of the line conductor with a distance therebetween, and is disposed so as to cross over a hypothetical extension line extending from the end in parallel with a line direction of the line conductor, and a terminating resistor configured to electrically connect an end portion of the line conductor and the ground conductor.
    Type: Application
    Filed: January 30, 2009
    Publication date: December 9, 2010
    Applicant: KYOCERA CORPORATION
    Inventor: Takayuki Shirasaki
  • Publication number: 20100231332
    Abstract: A high-frequency module has a wiring board including a dielectric substrate, a line conductor that is formed on a first surface of the dielectric substrate, and a first grounding conductor layer that is formed on a second surface opposed to the first surface of the dielectric substrate, and that has a first opening and a second opening disposed around the first opening; and a waveguide that is connected to the second surface, has an opening opposed to the first opening, and is electromagnetically coupled to the line conductor. The wiring board has a vertical choke portion that at least partially extends from the second opening in a direction perpendicular to the second surface. Furthermore, a horizontal choke portion is formed between the wiring board and the waveguide, along the second surface between the opening of the waveguide and the second opening.
    Type: Application
    Filed: September 29, 2008
    Publication date: September 16, 2010
    Applicant: KYOCERA CORPORATION
    Inventors: Yoshimasa Sugimoto, Takayuki Shirasaki
  • Patent number: 6873230
    Abstract: The problem is that, since a coplanar ground conductor located immediately below a line conductor is absent near a through conductor for providing connection between the one ends of the line conductors each having the coplanar ground conductor, characteristic impedance mismatch occurs and this leads to poor transmission characteristics. The invention provides a high-frequency wiring board in which, given that the interval between the first/second line conductor and part of the first/second coplanar ground conductor located around each side of the line conductor is S, and that the distance between the first/second line conductor and its corresponding second/first coplanar ground conductor facing each other via the dielectric substrate is H, then the following relationship holds: S<H/2.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: March 29, 2005
    Assignee: Kyocera Corporation
    Inventor: Takayuki Shirasaki
  • Publication number: 20040119565
    Abstract: The problem is that, since a coplanar ground conductor located immediately below a line conductor is absent near a through conductor for providing connection between the one ends of the line conductors each having the coplanar ground conductor, characteristic impedance mismatch occurs and this leads to poor transmission characteristics. The invention provides a high-frequency wiring board in which, given that the interval between the first/second line conductor and part of the first/second coplanar ground conductor located around each side of the line conductor is S, and that the distance between the first/second line conductor and its corresponding second/first coplanar ground conductor facing each other via the dielectric substrate is H, then the following relationship holds: S<H/2.
    Type: Application
    Filed: July 23, 2003
    Publication date: June 24, 2004
    Applicant: KYOCERA CORPORATION
    Inventor: Takayuki Shirasaki
  • Patent number: 6726488
    Abstract: A high-frequency wiring board of the present invention is characterized in that W1>W2 and S1≧S2 are satisfied in which W1 is a line width of a portion having a predetermined characteristic impedance of a line conductor, W2 is a conductor width of the line conductor in proximity to a connection of one end of the line conductor to a through conductor, S1 is an interval between the portion having the line width W1 of the line conductor and a same plane ground conductor, and S2 is an interval between the portion of the one end of the line conductor in proximity to the connection to the through conductor and the same plane ground conductor.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: April 27, 2004
    Assignee: Kyocera Corporation
    Inventor: Takayuki Shirasaki
  • Patent number: D822629
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: July 10, 2018
    Assignee: KYOCERA Corporation
    Inventors: Taito Kimura, Takayuki Shirasaki