Patents by Inventor Takayuki Takano

Takayuki Takano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230214136
    Abstract: A memory system includes a nonvolatile memory and a controller that includes an encoder configured to encode a first group of data including a plurality of first data, each first data having a plurality of bits. The encoder is configured to perform a first encoding process of generating a second group of data including a plurality of second data from the plurality of first data in the first group, and a second encoding process of generating a third group of data including a plurality of third data from the plurality of second data in the second group. A logical value of “1” is less likely to be the value in an n-th bit position of the plurality of third data in the third group than the value in any of the bit positions of the plurality of second data in the second group.
    Type: Application
    Filed: August 9, 2022
    Publication date: July 6, 2023
    Inventor: Takayuki TAKANO
  • Publication number: 20210255796
    Abstract: According to one embodiment, a memory system includes a plurality of nonvolatile memory chips and a controller configured to control the nonvolatile memory chips through a channel. The controller detects a program command sequence and sets a second chip enable signal corresponding to a second nonvolatile memory chip of the nonvolatile memory chips to the enable state during a period of at least data input cycle in the detected program command sequence. The controller transmits, when it is indicated that a ready/busy signal input to the controller while the second chip enable signal is in the enable state, a command sequence to the second nonvolatile memory chip.
    Type: Application
    Filed: September 14, 2020
    Publication date: August 19, 2021
    Applicant: Kioxia Corporation
    Inventor: Takayuki Takano
  • Patent number: 10949121
    Abstract: A memory system includes a memory chip, a queue block and a memory controller. The queue block is configured to store a command to be transmitted to the memory chip. The queue block includes a first queue and a plurality of second queues each corresponding to a plane of the memory chip. The memory controller is configured to determine whether or not a first command enqueued in the first queue is a first read command. The first read command is a command for executing read operation in the planes asynchronously. When the first command is the first read command, the memory controller transfers the first command to one of the second queues corresponding to a plane in which the first command is to be executed. The memory controller selects the first queue or the second queues as a source of a command to be transferred to the memory chip.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: March 16, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Takayuki Takano
  • Patent number: 10770397
    Abstract: A semiconductor module includes: a base substrate that includes a first dielectric film and an electrode layer, the first dielectric film having a mounting surface, the mounting surface including a first mounting area and a second mounting area; a first semiconductor part mounted on the first mounting area; and a second semiconductor part mounted on the second mounting area, the second semiconductor part including a vertical power semiconductor device, a conductive block to be connected to the electrode layer, and a wiring substrate, the vertical power semiconductor device having a first surface and a second surface, the first surface including a first terminal to be connected to the electrode layer, the second surface including a second terminal, the wiring substrate electrically connecting the conductive block and the second terminal.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: September 8, 2020
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Takayuki Takano, Yuichi Sasajima
  • Patent number: 10651119
    Abstract: The present disclosure includes: a flexible resin substrate made of a polyimide resin; an adhesion layer provided on the resin substrate; a semiconductor element mounted face down to the resin substrate and fixed to the resin substrate through the adhesion layer; a via hole provided in the resin substrate to correspond to an element electrode of the semiconductor element; a module electrode provided to the resin substrate to be in contact with the element electrode of the semiconductor element through the via hole; a protruding portion provided, around the element electrode or in a peripheral edge portion of the semiconductor element, on a surface of the semiconductor element; and an escape portion for the adhesion layer covering a head portion of the protruding portion to escape, the escape portion being provided in a region, of the resin substrate, corresponding to the protruding portion.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: May 12, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Takayuki Takano, Tasuku Kawashima
  • Publication number: 20200027836
    Abstract: A semiconductor module includes: a base substrate that includes a first dielectric film and an electrode layer, the first dielectric film having a mounting surface, the mounting surface including a first mounting area and a second mounting area; a first semiconductor part mounted on the first mounting area; and a second semiconductor part mounted on the second mounting area, the second semiconductor part including a vertical power semiconductor device, a conductive block to be connected to the electrode layer, and a wiring substrate, the vertical power semiconductor device having a first surface and a second surface, the first surface including a first terminal to be connected to the electrode layer, the second surface including a second terminal, the wiring substrate electrically connecting the conductive block and the second terminal.
    Type: Application
    Filed: July 18, 2019
    Publication date: January 23, 2020
    Inventors: Takayuki TAKANO, Yuichi SASAJIMA
  • Publication number: 20200026466
    Abstract: A memory system includes a memory chip, a queue block and a memory controller. The queue block is configured to store a command to be transmitted to the memory chip. The queue block includes a first queue and a plurality of second queues each corresponding to a plane of the memory chip. The memory controller is configured to determine whether or not a first command enqueued in the first queue is a first read command. The first read command is a command for executing read operation in the planes asynchronously. When the first command is the first read command, the memory controller transfers the first command to one of the second queues corresponding to a plane in which the first command is to be executed. The memory controller selects the first queue or the second queues as a source of a command to be transferred to the memory chip.
    Type: Application
    Filed: February 22, 2019
    Publication date: January 23, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Takayuki TAKANO
  • Publication number: 20200006170
    Abstract: A semiconductor module includes: a dielectric film that has a first surface and a second surface opposed to the first surface; a plurality of circuit parts mounted on the first surface; an electrode layer that is disposed on the second surface and includes a plurality of electrode portions to be electrically connected to the plurality of circuit parts, at least a part of the plurality of electrode portions including a base that is long in one axis direction; a rigid member that is disposed on the first surface, includes, at least one shaft portion, and faces the base with the dielectric layer sandwiched therebetween, the at least one shaft axis extending along the one axis direction; and a sealing layer that is provided on the first surface and covers the plurality of circuit parts and the rigid member.
    Type: Application
    Filed: June 28, 2019
    Publication date: January 2, 2020
    Inventors: Takashi NUNOKAWA, Yuichi SASAJIMA, Takayuki TAKANO
  • Publication number: 20200006255
    Abstract: A semiconductor module includes: a dielectric film that has a first surface and a second surface opposed to the first surface, the first surface including a first mounting area and a second mounting area; a plurality of circuit parts that includes a first circuit part and a second circuit part, the first circuit part being mounted on the first mounting area, the second circuit part being mounted on the second mounting area; an electrode layer that is disposed on the second surface and includes a plurality of electrode portions to be electrically connected to the plurality of circuit parts; and a sealing layer that includes a first sealing resin portion and a second sealing resin portion and seals the plurality of circuit parts, the first sealing resin portion covering the first mounting area, the second sealing resin portion being formed of a resin material softer than the first sealing resin portion and covering the second mounting area.
    Type: Application
    Filed: June 28, 2019
    Publication date: January 2, 2020
    Inventors: Takashi NUNOKAWA, Takayuki TAKANO
  • Publication number: 20190198430
    Abstract: The present disclosure includes: a flexible resin substrate made of a polyimide resin; an adhesion layer provided on the resin substrate; a semiconductor element mounted face down to the resin substrate and fixed to the resin substrate through the adhesion layer; a via hole provided in the resin substrate to correspond to an element electrode of the semiconductor element; a module electrode provided to the resin substrate to be in contact with the element electrode of the semiconductor element through the via hole; a protruding portion provided, around the element electrode or in a peripheral edge portion of the semiconductor element, on a surface of the semiconductor element; and an escape portion for the adhesion layer covering a head portion of the protruding portion to escape, the escape portion being provided in a region, of the resin substrate, corresponding to the protruding portion.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 27, 2019
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Takayuki TAKANO, Tasuku KAWASHIMA
  • Patent number: 10296461
    Abstract: According to one embodiment, a storage device includes a first nonvolatile memory, a second volatile memory, and a controller. In the second volatile memory, at least one of management information for managing user data written in the first nonvolatile memory and the user data is temporarily written as cache data. The controller is configured to execute processing for writing the cache data written in the second volatile memory to a third memory of the host device, if the storage device is changed from a regular mode to a low power consumption mode in which supplying of power to the second volatile memory is stopped, in response to a request from a host device.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: May 21, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Takayuki Takano
  • Patent number: 9966187
    Abstract: A coil component includes: a pillar part, quadrangular planar parts formed at both ends of the pillar part, a coil formed by winding an insulating sheath conductor around the pillar part, electrode terminals that are electrically connected to both ends of the coil, and an outer sheath covering the coil at least partially; wherein the pillar part and quadrangular planar parts are made of ferrite material; the outer sheath contains metal magnetic grains and resin material; and based on a section obtained by cutting through the center of the pillar part vertically to the long-axis direction of the pillar part, the cross-section area of the pillar part is greater than the cross-section area of the outer sheath.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: May 8, 2018
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Hidenori Aoki, Takayuki Takano, Tetsuo Kumahora
  • Patent number: 9675896
    Abstract: A walking toy includes a body on which gravity center position adjusting members and paired legs are supported to be able to swing in a forward/backward direction, and a gearbox which has a crank mechanism for forcibly swinging the paired legs alternately forward and backward in a forcible swinging direction and which is mounted in the body. Each of the paired legs has a bottom which is configured to be in contact with a floor surface and which is formed into a curved face curved in the forcible swinging direction. The gearbox is driven by a torsion coil spring and has a lever which rotates a drive gear of a gear train for transmitting rotation of the torsion coil spring to an output shaft for rotating the crank mechanism.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: June 13, 2017
    Assignee: MD Works Company Limited
    Inventors: Ryota Morikawa, Takayuki Takano
  • Publication number: 20170038973
    Abstract: According to one embodiment, a storage device includes a first nonvolatile memory, a second volatile memory, and a controller. In the second volatile memory, at least one of management information for managing user data written in the first nonvolatile memory and the user data is temporarily written as cache data. The controller is configured to execute processing for writing the cache data written in the second volatile memory to a third memory of the host device, if the storage device is changed from a regular mode to a low power consumption mode in which supplying of power to the second volatile memory is stopped, in response to a request from a host device.
    Type: Application
    Filed: March 4, 2016
    Publication date: February 9, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Takayuki TAKANO
  • Publication number: 20160027574
    Abstract: A coil component includes: a pillar part, quadrangular planar parts formed at both ends of the pillar part, a coil formed by winding an insulating sheath conductor around the pillar part, electrode terminals that are electrically connected to both ends of the coil, and an outer sheath covering the coil at least partially; wherein the pillar part and quadrangular planar parts are made of ferrite material; the outer sheath contains metal magnetic grains and resin material; and based on a section obtained by cutting through the center of the pillar part vertically to the long-axis direction of the pillar part, the cross-section area of the pillar part is greater than the cross-section area of the outer sheath.
    Type: Application
    Filed: July 28, 2015
    Publication date: January 28, 2016
    Inventors: Hidenori AOKI, Takayuki TAKANO, Tetsuo KUMAHORA
  • Publication number: 20150217202
    Abstract: A walking toy includes a body on which gravity center position adjusting members and paired legs are supported to be able to swing in a forward/backward direction, and a gearbox which has a crank mechanism for forcibly swinging the paired legs alternately forward and backward in a forcible swinging direction and which is mounted in the body. Each of the paired legs has a bottom which is configured to be in contact with a floor surface and which is formed into a curved face curved in the forcible swinging direction. The gearbox is driven by a torsion coil spring and has a lever which rotates a drive gear of a gear train for transmitting rotation of the torsion coil spring to an output shaft for rotating the crank mechanism.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 6, 2015
    Inventors: Ryota Morikawa, Takayuki Takano
  • Patent number: 8196451
    Abstract: There is provided a technique that can increase sensitivity of a resonator. A ratio Rb/Ra between an inner diameter Rb and an outer diameter Ra of the resonator 20 is appropriately selected, and thus there may be a fixed point where an r component (U(Ra) or U(Rb)) of displacement in a radial direction and an r component (V(Ra) or V(Rb)) of displacement in a tangential direction are 0 on an outer diameter portion or an inner diameter portion of the resonator 20. In this case, the resonator 20 is supported by a holding member 22 constituted by a single-span beam set so that a boundary condition on a side of the resonator 20 is pinned and a boundary condition on a side of an anchor that supports the resonator 20 is clamped at the fixed point, and this prevents vibration energy of the resonator 20 from being lost through the holding member 22, avoids a state to disturb a vibration mode, and achieves a sensor having high sensitivity.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: June 12, 2012
    Assignees: National Institute of Advanced Industrial Science and Technology, Olympus Corporation
    Inventors: Mitsuo Konno, Tsuyoshi Ikehara, Takayuki Takano, Takashi Mihara
  • Publication number: 20100223987
    Abstract: There is provided a technique that can increase sensitivity of a resonator. A ratio Rb/Ra between an inner diameter Rb and an outer diameter Ra of the resonator 20 is appropriately selected, and thus there may be a fixed point where an r component (U(Ra) or U(Rb)) of displacement in a radial direction and an r component (V(Ra) or V(Rb)) of displacement in a tangential direction are 0 on an outer diameter portion or an inner diameter portion of the resonator 20. In this case, the resonator 20 is supported by a holding member 22 constituted by a single-span beam set so that a boundary condition on a side of the resonator 20 is pinned and a boundary condition on a side of an anchor that supports the resonator 20 is clamped at the fixed point, and this prevents vibration energy of the resonator 20 from being lost through the holding member 22, avoids a state to disturb a vibration mode, and achieves a sensor having high sensitivity.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 9, 2010
    Applicants: National Institute of Advanced Industrial Science and Technology, Olympus Corporation
    Inventors: Mitsuo Konno, Tsuyoshi Ikehara, Takayuki Takano, Takashi Mihara
  • Patent number: 5940414
    Abstract: A logic circuit has a first circuit block, a second circuit block, and a test circuit composed of a first multiplexer and a second multiplexer.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: August 17, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Takano, Susumu Nitta
  • Patent number: 4248968
    Abstract: The present invention relates to a process for producing acrylamide or methacrylamide utilizing microorganisms having a nitrilase activity. This process involves (1) utilizing highly active novel bacteria belonging to the genus Corynebacterium or the genus Nocardia, (2) conducting the reaction utilizing microorganisms having a nitrilase activity at temperatures as low as the freezing point of the medium to 15.degree. C. so as to conduct the reaction for a long period of time while maintaining a high concentration of acrylamide or methacrylamide, and (3) conducting the reaction according to a newly devised continuous column process to obtain a highly concentrated acrylamide or methacrylamide aqueous solution with economic advantages.
    Type: Grant
    Filed: March 28, 1979
    Date of Patent: February 3, 1981
    Assignee: Nitto Chemical Industry Co., Ltd.
    Inventors: Ichiro Watanabe, Yoshiaki Satoh, Takayuki Takano