Patents by Inventor Takayuki Takao

Takayuki Takao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7535243
    Abstract: When first and second measuring equipment connected to switches are switched to measure multiple types of electronic characteristics of a device under test which is a semiconductor device, the device under test is disconnected from the second measuring equipment and is connected to the first measuring equipment. Thereafter, the first measuring equipment applies a voltage to the device under test via the switches so that the voltage of the first measuring equipment matches the output voltage of the second measuring equipment. The device under test is then disconnected from the first measuring equipment and is connected to the second measuring equipment for measurement.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: May 19, 2009
    Assignee: Agilent Technologies, Inc.
    Inventors: Yasushi Hashimoto, Takayuki Takao
  • Publication number: 20070018636
    Abstract: When first and second measuring means connected to switching means are switched to measure multiple types of electronic characteristics of a device under test which is a semiconductor device, the device under test is disconnected from the second measuring means and is connected to the first measuring means. Thereafter, the first measuring means applies a voltage to the device under test via the switching means so that the voltage of the first measuring means matches the output voltage of the second measuring means. The device under test is then disconnected from the first measuring means and is connected to the second measuring means for measurement.
    Type: Application
    Filed: July 10, 2006
    Publication date: January 25, 2007
    Inventors: Yasushi Hashimoto, Takayuki Takao
  • Patent number: 6639417
    Abstract: A semiconductor parametric testing apparatus includes designating a die and module on each wafer at which a test should be paused and pausing a test at the preselected die and module on each wafer.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: October 28, 2003
    Assignee: Agilent Technologies, Inc.
    Inventor: Takayuki Takao
  • Publication number: 20020000826
    Abstract: The present invention makes it easier to find defective spots on wafers, to test them in more detail, and investigate their causes. A semiconductor parametric testing apparatus is provided that includes means for designating a die 107, 20 and module 106, 21 on each wafer at which a test should be paused and that pauses a test at a preselected die and module on each wafer 104, 2.
    Type: Application
    Filed: June 26, 2001
    Publication date: January 3, 2002
    Inventor: Takayuki Takao