Patents by Inventor Takayuki Takei

Takayuki Takei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11198106
    Abstract: An object of the invention is to provide a method for producing a capsule or microbead having high encapsulation efficiency of an encapsulated substance, high production efficiency, and high versatility. The invention relates to a method for producing a microcapsule or microbead, comprising: a step of disposing a monomer droplet or polymer droplet containing a substance to be encapsulated, which has a surface coated with a plurality of solid fine particles, on a flat surface; and a step of solidifying the monomer droplet or polymer droplet disposed on the flat surface in a gas phase so as to form an outer shell of a capsule or microbead, thereby forming a region enclosed by the outer shell, wherein the substance is encapsulated in the region.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: December 14, 2021
    Assignee: KAGOSHIMA UNIVERSITY
    Inventors: Takayuki Takei, Masahiro Yoshida, Yoshihiro Ohzuno, Gen Hayase
  • Publication number: 20200171454
    Abstract: An object of the invention is to provide a method for producing a capsule or microbead having high encapsulation efficiency of an encapsulated substance, high production efficiency, and high versatility. The invention relates to a method for producing a microcapsule or microbead, comprising: a step of disposing a monomer droplet or polymer droplet containing a substance to be encapsulated, which has a surface coated with a plurality of solid fine particles, on a flat surface; and a step of solidifying the monomer droplet or polymer droplet disposed on the flat surface in a gas phase so as to form an outer shell of a capsule or microbead, thereby forming a region enclosed by the outer shell, wherein the substance is encapsulated in the region.
    Type: Application
    Filed: August 8, 2018
    Publication date: June 4, 2020
    Applicant: KAGOSHIMA UNIVERSITY
    Inventors: Takayuki TAKEI, Masahiro YOSHIDA, Yoshihiro OHZUNO, Gen HAYASE
  • Publication number: 20170216444
    Abstract: An object is to provide a preparation for forming emboli highly safe in a living body and capable of retaining and controlled-releasing an anticancer agent, occluding a blood vessel when injected into the blood vessel, unlikely to be washed out and having a controlled decomposition time (i.e., occludes a blood vessel for a while and quickly decomposes to prevent the necrosis of the entire tissues when the function is completed). The preparation for forming emboli according to the present invention comprises a solution comprising a phenolic hydroxyl group-modified polymer represented by the following formula (1): wherein P is a biocompatible polymer, A is a single bond or an —OCO—C2-C4-alkenylene group, a —CONH—C1-C4-alkylene group or an —HNCO—C1-C4-alkylene group, and X is hydrogen or a C1-C3-alkoxy group, a solution comprising at least one selected from a peroxidase, a laccase, a tyrosinase, a catalase and an iron porphyrin complex and a solution comprising hydrogen peroxide.
    Type: Application
    Filed: October 19, 2015
    Publication date: August 3, 2017
    Inventors: Tsutomu TAMAI, Takayuki TAKEI, Akio IDO, Masahiro YOSHIDA, Shinji SAKAI
  • Patent number: 4960724
    Abstract: A method is provided for manufacturing a master slice semiconductor integrated circuit device. Initially, a first total circuit diagram which is to be reformed into a master slice semiconductor integrated circuit device is defined. First and second circuit points on the first total circuit block which are to be used respectively as input and output terminals of the master slice semiconductor integrated circuit device are specified. Next, signal transmitting paths are successively traced from the output to the input of each logic gate located in the signal transmitting paths in actual use. In the course of the tracing, these traced gates are marked and the logic gates actually in use are identified. As a result, in addition to those logic gates having unused output terminals, the gates constituting a closed loop isolated from the signal transmitting paths for transmitting substantial output signals are identified as unnecessary gates and deleted.
    Type: Grant
    Filed: July 11, 1989
    Date of Patent: October 2, 1990
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Shoichi Watanabe, Takayuki Takei, Terumine Hayashi, Takashi Natabe
  • Patent number: D709800
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 29, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Ian Richard Cartabiano, Matthew Niven Sperling, Takayuki Takei