Patents by Inventor Takayuki Ueshima

Takayuki Ueshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240157793
    Abstract: A switch device includes a panel having a first design and a second design, a first switch configured to detect an operation performed on the first design displayed on the panel, a second switch configured to detect an operation performed on the second design displayed on the panel, and a control unit configured to set a display state in which the first design is displayed and a non-display state in which the second design is not displayed, in an initial state, and switch the second design from the non-display state to the display state based on an operation to the first switch.
    Type: Application
    Filed: October 26, 2023
    Publication date: May 16, 2024
    Inventors: Yoshinori MASATSUGU, Takayuki KAMIYA, Yusuke UESHIMA
  • Patent number: 7704848
    Abstract: A method for designing a semiconductor device includes: based on information on layout of a resistive element and information on layout of wiring disposed on a layer above the resistive element when seen in section, determining whether or not the resistive element and the wiring overlap each other when seen from above; and if it is determined that there is an overlap between the resistive element and the wiring when seen from above, changing at least one of the layout of the resistive element and the layout of the wiring so as to eliminate the overlap.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: April 27, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Takayuki Ueshima
  • Publication number: 20080054404
    Abstract: A method for designing a semiconductor device includes: based on information on layout of a resistive element and information on layout of wiring disposed on a layer above the resistive element when seen in section, determining whether or not the resistive element and the wiring overlap each other when seen from above; and if it is determined that there is an overlap between the resistive element and the wiring when seen from above, changing at least one of the layout of the resistive element and the layout of the wiring so as to eliminate the overlap.
    Type: Application
    Filed: August 23, 2007
    Publication date: March 6, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Takayuki UESHIMA