Patents by Inventor Takayuki Wakayama

Takayuki Wakayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210234038
    Abstract: A semiconductor device includes: a silicon carbide semiconductor layer of a first conductivity type disposed on a semiconductor substrate; a first impurity region of a second conductivity type located on a surface of the semiconductor layer, the first impurity region surrounding the active region; a plurality of rings of the second conductivity type surrounding the first impurity region; a first insulating film disposed to cover a portion of the first impurity region and the plurality of rings, the first insulating film having a first aperture; a first electrode within the first aperture, the first electrode; a second insulating film disposed to surround the active region, the second insulating film having a higher moisture resistance than the first insulating film; a third insulating film covering a portion of the first electrode and the second insulating film, and a second electrode disposed on the rear face of the semiconductor substrate.
    Type: Application
    Filed: January 22, 2021
    Publication date: July 29, 2021
    Inventors: Masao UCHIDA, Kouichi SAITOU, Takashi HASEGAWA, Takayuki WAKAYAMA
  • Publication number: 20180151719
    Abstract: A silicon carbide semiconductor device includes a first conductivity type silicon carbide substrate having an active region and a termination region surrounding the active region, a plurality of unit cells located in the active region, and a termination structure located in the termination region. Each unit cell is provided with a transistor structure. The termination structure includes the silicon carbide semiconductor layer, a second conductivity type second body region surrounding the active region, one or more second conductivity type rings surrounding the second body region, one or more outer-circumferential upper source electrodes surrounding the active region, and an upper gate electrode. The silicon carbide semiconductor device further includes a first protective film and a second protective film.
    Type: Application
    Filed: November 14, 2017
    Publication date: May 31, 2018
    Inventors: TSUNEICHIRO SANO, ATSUSHI OHOKA, TSUTOMU KIYOSAWA, OSAMU ISHIYAMA, TAKAYUKI WAKAYAMA, KOUICHI SAITOU, TAKASHI HASEGAWA, DAISUKE SHINDO, OSAMU KUSUMOTO
  • Patent number: 9985125
    Abstract: A silicon carbide semiconductor device includes a first conductivity type silicon carbide substrate having an active region and a termination region surrounding the active region, a plurality of unit cells located in the active region, and a termination structure located in the termination region. Each unit cell is provided with a transistor structure. The termination structure includes the silicon carbide semiconductor layer, a second conductivity type second body region surrounding the active region, one or more second conductivity type rings surrounding the second body region, one or more outer-circumferential upper source electrodes surrounding the active region, and an upper gate electrode. The silicon carbide semiconductor device further includes a first protective film and a second protective film.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: May 29, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tsuneichiro Sano, Atsushi Ohoka, Tsutomu Kiyosawa, Osamu Ishiyama, Takayuki Wakayama, Kouichi Saitou, Takashi Hasegawa, Daisuke Shindo, Osamu Kusumoto
  • Patent number: 9773924
    Abstract: A semiconductor device according to an aspect of the present disclosure includes a semiconductor substrate having a first conductivity type and having a principal surface and a back surface, a silicon carbide semiconductor layer having the first conductivity type and disposed on the principal surface, barrier regions having a second conductivity type and disposed within the silicon carbide semiconductor layer, an edge termination region having the second conductivity type and disposed within the silicon carbide semiconductor layer, the edge termination region enclosing the barrier regions, a first electrode disposed on the silicon carbide semiconductor layer, and a second electrode disposed on the back surface, wherein each of the barrier regions has a polygonal boundary with the silicon carbide semiconductor layer, and each of sides of the polygonal boundary has an angle of 0° to 5° inclusive relative to <11-20> direction of crystal orientations of the semiconductor substrate.
    Type: Grant
    Filed: April 2, 2016
    Date of Patent: September 26, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masao Uchida, Kouichi Saitou, Takayuki Wakayama
  • Publication number: 20160315203
    Abstract: A semiconductor device according to an aspect of the present disclosure includes a semiconductor substrate having a first conductivity type and having a principal surface and a back surface, a silicon carbide semiconductor layer having the first conductivity type and disposed on the principal surface, barrier regions having a second conductivity type and disposed within the silicon carbide semiconductor layer, an edge termination region having the second conductivity type and disposed within the silicon carbide semiconductor layer, the edge termination region enclosing the barrier regions, a first electrode disposed on the silicon carbide semiconductor layer, and a second electrode disposed on the back surface, wherein each of the barrier regions has a polygonal boundary with the silicon carbide semiconductor layer, and each of sides of the polygonal boundary has an angle of 0° to 5° inclusive relative to <11-20> direction of crystal orientations of the semiconductor substrate.
    Type: Application
    Filed: April 2, 2016
    Publication date: October 27, 2016
    Inventors: MASAO UCHIDA, KOUICHI SAITOU, TAKAYUKI WAKAYAMA
  • Publication number: 20160308072
    Abstract: A semiconductor device according to an aspect of the present disclosure includes a semiconductor substrate having a first conductivity type and having a principal surface and a back surface, a silicon carbide semiconductor layer having the first conductivity type and disposed on the principal surface of the semiconductor substrate, a guard ring region having a second conductivity type and disposed within the silicon carbide semiconductor layer, a floating region having the second conductivity type and disposed within the silicon carbide semiconductor layer, a first electrode disposed on the silicon carbide semiconductor layer, and a second electrode disposed on the back surface of the semiconductor substrate, wherein the guard ring region and the floating region each include a pair of a high-concentration region having the second conductivity type and a low-concentration region having the second conductivity type.
    Type: Application
    Filed: April 1, 2016
    Publication date: October 20, 2016
    Inventors: MASAO UCHIDA, KOUICHI SAITOU, TAKAYUKI WAKAYAMA, MASASHI HAYASHI, TATSUYA KUNISATO
  • Patent number: 9362370
    Abstract: A semiconductor device includes: a first silicon carbide semiconductor layer; a p-type first impurity region provided in the first silicon carbide semiconductor layer; and a first ohmic electrode forming ohmic contact with the p-type first impurity region. The first ohmic electrode is a silicon alloy containing nitrogen, an average concentration of nitrogen in the first ohmic electrode is higher than or equal to one half of an average concentration of nitrogen in the first impurity region, and an average concentration of a p-type impurity in a portion of the first ohmic electrode except a portion of the first ohmic electrode within 50 nm from an interface between the first ohmic electrode and the first impurity region is equal to or lower than 3.0×1018 cm?3.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: June 7, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Chiaki Kudou, Tsutomu Kiyosawa, Takayuki Wakayama
  • Publication number: 20150001553
    Abstract: A semiconductor device includes: a first silicon carbide semiconductor layer; a p-type first impurity region provided in the first silicon carbide semiconductor layer; and a first ohmic electrode forming ohmic contact with the p-type first impurity region. The first ohmic electrode is a silicon alloy containing nitrogen, an average concentration of nitrogen in the first ohmic electrode is higher than or equal to one half of an average concentration of nitrogen in the first impurity region, and an average concentration of a p-type impurity in a portion of the first ohmic electrode except a portion of the first ohmic electrode within 50 nm from an interface between the first ohmic electrode and the first impurity region is equal to or lower than 3.0×1018 cm?3.
    Type: Application
    Filed: July 9, 2013
    Publication date: January 1, 2015
    Applicant: PANASONIC CORPORATION
    Inventors: Chiaki Kudou, Tsutomu Kiyosawa, Takayuki Wakayama